74LVC2G06GW-Q100 Series

Inverters with open-drain outputs

Manufacturer: Freescale Semiconductor - NXP

Catalog

Inverters with open-drain outputs

Part	Current - Quiescent (Max) [Max]	Supplier Device Package	Supplier Device Package [x]	Supplier Device Package [y]	Logic Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Number of Inputs	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Package / Case	Voltage - Supply [Max]	Voltage - Supply [Min]	Features	Max Propagation Delay @ V, Max CL	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Number of Circuits	Grade	Qualification
Freescale Semiconductor - NXP 74LVC2G06GN,132	4 µA	6-XSON	0.9	1	Inverter	-	32 mA	2	0.8 V	0.7 V	6-XFDFN	5.5 V	1.65 V	Open Drain	2.9 ns	1.7 V	2 V	125 °C	-40 °C	Surface Mount	2
Freescale Semiconductor - NXP 74LVC2G06GV-Q100H	4 µA	6-TSOP			Inverter	-	32 mA	2	0.8 V	0.7 V	SC-74 SOT-457	5.5 V	1.65 V	Open Drain	2.9 ns	1.7 V	2 V	125 °C	-40 °C	Surface Mount	2	Automotive	AEC-Q100
Freescale Semiconductor - NXP 74LVC2G06GF,132	4 µA	6-XSON SOT891 (1x1)			Inverter	-	32 mA	2	0.8 V	0.7 V	6-XFDFN	5.5 V	1.65 V	Open Drain	2.9 ns	1.7 V	2 V	125 °C	-40 °C	Surface Mount	2
Freescale Semiconductor - NXP 74LVC2G06GW-Q100H	4 µA	6-TSSOP			Inverter	-	32 mA	2	0.8 V	0.7 V	6-TSSOP SC-88 SOT-363	5.5 V	1.65 V	Open Drain	2.9 ns	1.7 V	2 V	125 °C	-40 °C	Surface Mount	2	Automotive	AEC-Q100
Freescale Semiconductor - NXP 74LVC2G06GV,125	4 µA	6-TSOP			Inverter	-	32 mA	2	0.8 V	0.7 V	SC-74 SOT-457	5.5 V	1.65 V	Open Drain	2.9 ns	1.7 V	2 V	125 °C	-40 °C	Surface Mount	2

Catalog

Inverters with open-drain outputs

Key Features

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)

• Specified from -40 °C to +85 °C and -40 °C to +125 °C

• Wide supply voltage range from 1.65 V to 5.5 V

• Overvoltage tolerant inputs to 5.5 V

• High noise immunity

• 24 mA output drive (VCC= 3.0 V)

• CMOS low power consumption

• Latch-up performance exceeds 250 mA

• Direct interface with TTL levels

• Complies with JEDEC standard:

• JESD8-7 (1.65 V to 1.95 V)

• JESD8-5 (2.3 V to 2.7 V)

• JESD8C (2.7 V to 3.6 V)

• JESD36 (4.5 V to 5.5 V)

• ESD protection:

• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

Description

The 74LVC2G06-Q100 is a dual inverter with open-drain outputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.