
SN74AVC32T245 Series
32-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs
Manufacturer: Texas Instruments
Catalog
32-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs
Key Features
• Member of the Texas Instruments Widebus+™ FamilyControl Inputs VIH/VILLevels Referenced to VCCAVoltageVCCIsolation Feature – If Either VCCInput is at GND, Both Ports are in the High-Impedance StateOvervoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data CommunicationsFully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.2 V to 3.6 V Power-Supply RangeIoffSupports Partial-Power-Down Mode Operation4.6 V Tolerant I/OsMax Data Rates380 Mbps (1.8 V to 3.3 V Level-Shifting)200 Mbps (< 1.8 V to 3.3 V Level-Shifting)200 Mbps (Translate to 2.5 V or 1.8 V)150 Mbps (Translate to 1.5 V)100 Mbps (Translate to 1.2 V)Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 224000 V Human-Body Model (A114-A)1000 V Charged-Device Model (C101)Member of the Texas Instruments Widebus+™ FamilyControl Inputs VIH/VILLevels Referenced to VCCAVoltageVCCIsolation Feature – If Either VCCInput is at GND, Both Ports are in the High-Impedance StateOvervoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data CommunicationsFully Configurable Dual-Rail Design Allows Each Port to Operate Over Full 1.2 V to 3.6 V Power-Supply RangeIoffSupports Partial-Power-Down Mode Operation4.6 V Tolerant I/OsMax Data Rates380 Mbps (1.8 V to 3.3 V Level-Shifting)200 Mbps (< 1.8 V to 3.3 V Level-Shifting)200 Mbps (Translate to 2.5 V or 1.8 V)150 Mbps (Translate to 1.5 V)100 Mbps (Translate to 1.2 V)Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 224000 V Human-Body Model (A114-A)1000 V Charged-Device Model (C101)
Description
AI
This 32-bit noninverting bus transceiver uses two separate, configurable power-supply rails. The SN74AVC32T245 device is optimized to operate with VCCA/VCCBset from 1.4 V to 3.6 V. It is operational with VCCA/VCCBas low as 1.2 V. The A port is designed to track VCCA. VCCAand accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCBand accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.
The SN74AVC32T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can disable the outputs so the buses are effectively isolated.
The SN74AVC32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1OE, 2OE, 3OE, and 4OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The VCCisolation feature ensures that if either VCCinput is at GND, then both ports are in the high-impedance state.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This 32-bit noninverting bus transceiver uses two separate, configurable power-supply rails. The SN74AVC32T245 device is optimized to operate with VCCA/VCCBset from 1.4 V to 3.6 V. It is operational with VCCA/VCCBas low as 1.2 V. The A port is designed to track VCCA. VCCAand accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCBand accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.
The SN74AVC32T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can disable the outputs so the buses are effectively isolated.
The SN74AVC32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1OE, 2OE, 3OE, and 4OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The VCCisolation feature ensures that if either VCCinput is at GND, then both ports are in the high-impedance state.
To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.