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SN74LV165B-EP

SN74LV165B-EP Series

Enhanced product eight-bit parallel-load shift registers

Manufacturer: Texas Instruments

Catalog

Enhanced product eight-bit parallel-load shift registers

Key Features

2 V to 5.5 V V CC operationMaximum t pd of 10.5 ns at 5 VSupports mixed-mode voltage operation on all portsI off supports partial-power-down mode operationLatch-up performance exceeds 250 mA per JESD 17Operating ambient temperature: -55°C to +125°CSupports defense, aerospace, and medical applications:Controlled baselineOne assembly and test siteOne fabrication siteExtended product life cycleProduct traceability2 V to 5.5 V V CC operationMaximum t pd of 10.5 ns at 5 VSupports mixed-mode voltage operation on all portsI off supports partial-power-down mode operationLatch-up performance exceeds 250 mA per JESD 17Operating ambient temperature: -55°C to +125°CSupports defense, aerospace, and medical applications:Controlled baselineOne assembly and test siteOne fabrication siteExtended product life cycleProduct traceability

Description

AI
The SN74LV165B-EP device is a parallel-load, 8-bit shift registers designed for 2 V to 5.5 V V CC operation. When the device is clocked, data is shifted toward the serial output Q H. Parallel-in access to each stage is provided by eight individual direct data inputs that are enabled by a low level at the shift/load (SH/ LD) input. The SN74LV165B-EP devices features a clock-inhibit function and a complemented serial output, Q H. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The SN74LV165B-EP device is a parallel-load, 8-bit shift registers designed for 2 V to 5.5 V V CC operation. When the device is clocked, data is shifted toward the serial output Q H. Parallel-in access to each stage is provided by eight individual direct data inputs that are enabled by a low level at the shift/load (SH/ LD) input. The SN74LV165B-EP devices features a clock-inhibit function and a complemented serial output, Q H. This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.