Zenode.ai Logo
Beta
TLC59210

TLC59210 Series

8-bit DMOS sink driver with Latch

Manufacturer: Texas Instruments

Catalog

8-bit DMOS sink driver with Latch

Key Features

DMOS ProcessHigh Voltage Output (Vds= 30 V)Output Current on Each Channel(IdsMax = 200 mA)Latch-Up Performance Exceeds 250 mA PerJEDEC Standard JESD-17ESD Protection Exceeds JESD 222000-V Human Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged Device Model (C101)LED Driver ApplicationOutput Clamp Diodes (Parasitic)Control Pins ofCLRand CLK InputsClock Input up to 1 MHzDMOS ProcessHigh Voltage Output (Vds= 30 V)Output Current on Each Channel(IdsMax = 200 mA)Latch-Up Performance Exceeds 250 mA PerJEDEC Standard JESD-17ESD Protection Exceeds JESD 222000-V Human Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged Device Model (C101)LED Driver ApplicationOutput Clamp Diodes (Parasitic)Control Pins ofCLRand CLK InputsClock Input up to 1 MHz

Description

AI
The TLC59210 is an 8-bit flip-flop driver for LED and solenoid with Schmitt-trigger buffers. Each channel can sink up to 200mA and support an output voltage up to 30V. The TLC59210 is designed for VCCand operation from 3.3V to 5.5V. Each output channel is controlled by a positive-edge-triggered D-type flip-flops with a direct clear (CLR) input. Information at the data (D) input meeting the setup time requirements is transferred to the Y output on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. The TLC59210 is characterized for operation from –40°C to 85°C. The TLC59210 is an 8-bit flip-flop driver for LED and solenoid with Schmitt-trigger buffers. Each channel can sink up to 200mA and support an output voltage up to 30V. The TLC59210 is designed for VCCand operation from 3.3V to 5.5V. Each output channel is controlled by a positive-edge-triggered D-type flip-flops with a direct clear (CLR) input. Information at the data (D) input meeting the setup time requirements is transferred to the Y output on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. The TLC59210 is characterized for operation from –40°C to 85°C.