AFE7906 Series

6-channel RF-sampling receiver, 5-MHz to 12-GHz, max 1200-MHz IBW

Catalog

6-channel RF-sampling receiver, 5-MHz to 12-GHz, max 1200-MHz IBW

Part	Package / Case	Frequency [Min]	Frequency [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Features	Supplier Device Package	Data Rate (Max)	Applications	Mounting Type	Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Power - Output
Texas Instruments AFE7906IABJ	400-BFBGA FCBGA	5 MHz	12 GHz	85 °C	-40 °C	14 Bit	400-FCBGA (17x17)	29.5 Gbps	General Purpose	Surface Mount
Texas Instruments AFE7906IALK	400-BFBGA FCBGA	5 MHz	12 GHz	85 °C	-40 °C		400-FCBGA (17x17)	24.33 Gbps		Surface Mount	TxRx Only	0.95 V 1.25 V 1.85 V	0.9 V 1.15 V 1.75 V	23.5 dBm

Catalog

6-channel RF-sampling receiver, 5-MHz to 12-GHz, max 1200-MHz IBW

Key Features

• Request full data sheetSix RF sampling 14 bit, 3 GSPS ADCsMaximum RF signal bandwidth:4 ADCs: 1200 MHz per ADC6 ADCs: 600 MHz per ADCRF frequency range: 5 MHz - 12 GHzDigital step attenuators (DSA): 25 dB range, 0.5-dB stepsSingle DDC (on 6 channels) or dual-band DDCs (on 4 channels)16x NCOs per DDC channelOptional Internal PLL/VCO for ADC clocks or external clock at ADC sample rateSysref alignment detectorSerDes data interface:JESD204B and JESD204C compatible8 SerDes transmitters up to 29.5 GbpsSubclass 1 multi-device synchronizationPackage: 17-mm × 17-mm FCBGA, 0.8-mm pitchRequest full data sheetSix RF sampling 14 bit, 3 GSPS ADCsMaximum RF signal bandwidth:4 ADCs: 1200 MHz per ADC6 ADCs: 600 MHz per ADCRF frequency range: 5 MHz - 12 GHzDigital step attenuators (DSA): 25 dB range, 0.5-dB stepsSingle DDC (on 6 channels) or dual-band DDCs (on 4 channels)16x NCOs per DDC channelOptional Internal PLL/VCO for ADC clocks or external clock at ADC sample rateSysref alignment detectorSerDes data interface:JESD204B and JESD204C compatible8 SerDes transmitters up to 29.5 GbpsSubclass 1 multi-device synchronizationPackage: 17-mm × 17-mm FCBGA, 0.8-mm pitch

Description

The AFE7906 is a high performance, wide bandwidth multi-channel receiver, integrating six RF Sampling ADCs. With operation up to 12 GHz, this device enables direct RF sampling in the L, S, C and X-band frequency ranges without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multi-mission systems. Each receiver chain includes a 25-dB range DSA (Digital Step Attenuator), followed by a 3-GSPS ADC (analog-to-digital converter). Four receiver channels have an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 1200 MHz for four RX or 600 MHz. The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock. spacer Each receiver chain includes a 25-dB range DSA (Digital Step Attenuator), followed by a 3-GSPS ADC (analog-to-digital converter). Each receiver channel has an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 1200 MHz for four RX without FB paths or 600 MHz with two FB paths (1200 MHz BW each). The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock. The AFE7906 is a high performance, wide bandwidth multi-channel receiver, integrating six RF Sampling ADCs. With operation up to 12 GHz, this device enables direct RF sampling in the L, S, C and X-band frequency ranges without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multi-mission systems. Each receiver chain includes a 25-dB range DSA (Digital Step Attenuator), followed by a 3-GSPS ADC (analog-to-digital converter). Four receiver channels have an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 1200 MHz for four RX or 600 MHz. The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock. spacer Each receiver chain includes a 25-dB range DSA (Digital Step Attenuator), followed by a 3-GSPS ADC (analog-to-digital converter). Each receiver channel has an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 1200 MHz for four RX without FB paths or 600 MHz with two FB paths (1200 MHz BW each). The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock.