SN74CB3Q3345 Series

3.3-V, 1:1 (SPST), 8-channel FET bus switch with 2 control inputs

Catalog

3.3-V, 1:1 (SPST), 8-channel FET bus switch with 2 control inputs

Part	Circuit [custom]	Circuit [custom]	Type	Supplier Device Package	Voltage - Supply [Min]	Voltage - Supply [Max]	Independent Circuits	Package / Case	Package / Case [y]	Package / Case [y]	Voltage Supply Source	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Package / Case [x]
Texas Instruments SN74CB3Q3345DGVR	8	1:1	Bus Switch	20-TVSOP	2.3 V	3.6 V	1	20-TFSOP	4.4 mm	0.173 in	Single Supply	85 °C	-40 °C	Surface Mount
Texas Instruments SN74CB3Q3345PWR	8	1:1	Bus Switch	20-TSSOP	2.3 V	3.6 V	1	20-TSSOP		4.4 mm	Single Supply	85 °C	-40 °C	Surface Mount	0.173 in
Texas Instruments SN74CB3Q3345PW	8	1:1	Bus Switch	20-TSSOP	2.3 V	3.6 V	1	20-TSSOP		4.4 mm	Single Supply	85 °C	-40 °C	Surface Mount	0.173 in

Catalog

3.3-V, 1:1 (SPST), 8-channel FET bus switch with 2 control inputs

Key Features

• High-Bandwidth Data Path (up to 500 MHz)(1)5-V-Tolerant I/Os With Device Powered Up or Powered DownLow and Flat ON-State Resistance (ron) Characteristics Over Operating Range(ron= 4Typ)Rail-to-Rail Switching on Data I/O Ports0- to 5-V Switching With 3.3-V VCC0- to 3.3-V Switching With 2.5-V VCCBidirectional Data Flow With Near-Zero Propagation DelayLow Input/Output Capacitance Minimizes Loading and Signal Distortion(Cio(OFF)= 4 pF Typ)Fast Switching Frequency (fOE= 20 MHz Max)Data and Control Inputs Provide Undershoot Clamp DiodesLow Power Consumption (ICC= 0.7 mA Typ)VCCOperating Range From 2.3 V to 3.6 VData I/Os Support 0- to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS OutputsIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)Supports Both Digital and Analog Applications: Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal GatingFor additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report,CBT-C, CB3T, and CB3Q Signal-Switch Families, literature number SCDA008.)High-Bandwidth Data Path (up to 500 MHz)(1)5-V-Tolerant I/Os With Device Powered Up or Powered DownLow and Flat ON-State Resistance (ron) Characteristics Over Operating Range(ron= 4Typ)Rail-to-Rail Switching on Data I/O Ports0- to 5-V Switching With 3.3-V VCC0- to 3.3-V Switching With 2.5-V VCCBidirectional Data Flow With Near-Zero Propagation DelayLow Input/Output Capacitance Minimizes Loading and Signal Distortion(Cio(OFF)= 4 pF Typ)Fast Switching Frequency (fOE= 20 MHz Max)Data and Control Inputs Provide Undershoot Clamp DiodesLow Power Consumption (ICC= 0.7 mA Typ)VCCOperating Range From 2.3 V to 3.6 VData I/Os Support 0- to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS OutputsIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)Supports Both Digital and Analog Applications: Differential Signal Interface, Memory Interleaving, Bus Isolation, Low-Distortion Signal GatingFor additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report,CBT-C, CB3T, and CB3Q Signal-Switch Families, literature number SCDA008.)

Description

The SN74CB3Q3345 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3345 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems. The SN74CB3Q3384A is organized as an 8-bit bus switch with two output-enable (OE,OE) inputs. When OE is high orOEis low, the bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is low andOEis high, the bus switch is OFF, and a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. The SN74CB3Q3345 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3345 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems. The SN74CB3Q3384A is organized as an 8-bit bus switch with two output-enable (OE,OE) inputs. When OE is high orOEis low, the bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is low andOEis high, the bus switch is OFF, and a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver.