ADC08DJ5200RF Series

RF-sampling 8-bit ADC with dual-channel 5.2 GSPS or single-channel 10.4 GSPS

Catalog

RF-sampling 8-bit ADC with dual-channel 5.2 GSPS or single-channel 10.4 GSPS

Part	Number of Inputs	Voltage - Supply, Digital [Max]	Voltage - Supply, Digital [Min]	Architecture	Configuration	Input Type	Voltage - Supply, Analog [Min]	Voltage - Supply, Analog [Max]	Number of A/D Converters	Supplier Device Package	Mounting Type	Package / Case	Number of Bits	Sampling Rate (Per Second)	Data Interface	Operating Temperature [Max]	Operating Temperature [Min]
Texas Instruments ADC08DJ5200RFAAV	2	1.15 V	1.05 V	Pipelined	MUX-ADC	Single Ended	1.05 V 1.8 V	1.15 V 2 V	2	144-FCBGA (10x10)	Surface Mount	144-FBGA FCBGA	8	5.2 G 10.4 G	SPI	85 °C	-40 °C

Catalog

RF-sampling 8-bit ADC with dual-channel 5.2 GSPS or single-channel 10.4 GSPS

Key Features

• ADC core:8-bit resolutionUp to 10.4GSPS in single-channel modeUp to 5.2GSPS in dual-channel modePerformance specifications:Noise floor (–20dBFS, VFS = 1 VPP-DIFF):Dual-channel mode: –143.4dBFS/HzSingle-channel mode: –146.2dBFS/HzENOB (dual channel, FIN = 2.4GHz, TYP): 7.8 BitsBuffered analog inputs with VCMI of 0V:Analog input bandwidth (–3dB): 8.1GHzUsable input frequency range: > 10GHzFull-scale input voltage (VFS, default): 0.8VPPNoiseless aperture delay (tAD) adjustment:Precise sampling control: 19fs StepSimplifies synchronization and interleavingTemperature and voltage invariant delaysEasy-to-use synchronization features:Automatic SYSREF timing calibrationTimestamp for sample markingJESD204C serial data interface:Maximum lane rate: 17.16GbpsSupport for 64b/66b and 8b/10b encoding8b/10b modes are JESD204B compatiblePeak RF Input Power (Diff): +26.5dBm (+ 27.5dBFS, 560x fullscale power)Programmable FIR filter for equalizationPower consumption: 3.8WPower supplies: 1.1V, 1.9VADC core:8-bit resolutionUp to 10.4GSPS in single-channel modeUp to 5.2GSPS in dual-channel modePerformance specifications:Noise floor (–20dBFS, VFS = 1 VPP-DIFF):Dual-channel mode: –143.4dBFS/HzSingle-channel mode: –146.2dBFS/HzENOB (dual channel, FIN = 2.4GHz, TYP): 7.8 BitsBuffered analog inputs with VCMI of 0V:Analog input bandwidth (–3dB): 8.1GHzUsable input frequency range: > 10GHzFull-scale input voltage (VFS, default): 0.8VPPNoiseless aperture delay (tAD) adjustment:Precise sampling control: 19fs StepSimplifies synchronization and interleavingTemperature and voltage invariant delaysEasy-to-use synchronization features:Automatic SYSREF timing calibrationTimestamp for sample markingJESD204C serial data interface:Maximum lane rate: 17.16GbpsSupport for 64b/66b and 8b/10b encoding8b/10b modes are JESD204B compatiblePeak RF Input Power (Diff): +26.5dBm (+ 27.5dBFS, 560x fullscale power)Programmable FIR filter for equalizationPower consumption: 3.8WPower supplies: 1.1V, 1.9V

Description

The ADC08DJ5200RF device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that directly samples input frequencies from DC to above 10GHz. The ADC08DJ5200RF can be configured as a dual-channel, 5.2GSPS ADC or single-channel, 10.4GSPS ADC. Support of a useable input frequency range of up to 10GHz enables direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems. The ADC08DJ5200RF uses a high-speed JESD204C output interface with up to 16 serialized lanes supporting up to 17.16Gbps line rate. Deterministic latency and multi-device synchronization is supported through JESD204C subclass-1. The JESD204C interface can be configured to trade-off line rate and number of lanes. Both 8b/10b and 64b/66b data encoding schemes are supported. 64b/66b encoding supports forward error correction (FEC) for improved bit error rates. The interface is backwards compatible with JESD204B receivers. Innovative synchronization features, including noiseless aperture delay adjustment and SYSREF windowing, simplify system design for multi-channel applications. A programmable FIR filter allows on-chip equalization. The ADC08DJ5200RF device is an RF-sampling, giga-sample, analog-to-digital converter (ADC) that directly samples input frequencies from DC to above 10GHz. The ADC08DJ5200RF can be configured as a dual-channel, 5.2GSPS ADC or single-channel, 10.4GSPS ADC. Support of a useable input frequency range of up to 10GHz enables direct RF sampling of L-band, S-band, C-band, and X-band for frequency agile systems. The ADC08DJ5200RF uses a high-speed JESD204C output interface with up to 16 serialized lanes supporting up to 17.16Gbps line rate. Deterministic latency and multi-device synchronization is supported through JESD204C subclass-1. The JESD204C interface can be configured to trade-off line rate and number of lanes. Both 8b/10b and 64b/66b data encoding schemes are supported. 64b/66b encoding supports forward error correction (FEC) for improved bit error rates. The interface is backwards compatible with JESD204B receivers. Innovative synchronization features, including noiseless aperture delay adjustment and SYSREF windowing, simplify system design for multi-channel applications. A programmable FIR filter allows on-chip equalization.