OMAP5912 Series

Applications processor

Catalog

Applications processor

Part	Number of Cores/Bus Width	Co-Processors/DSP	Mounting Type	Voltage - I/O	Core Processor	Package / Case	RAM Controllers	Supplier Device Package	Display & Interface Controllers	Security Features	Ethernet	Ethernet [Max]	Ethernet [Min]	Additional Interfaces	Speed	Operating Temperature [Min]	Operating Temperature [Max]	Graphics Acceleration	USB
Texas Instruments OMAP5912ZVL	1 Core 32 Bit	C55x CP15 Signal Processing System Control	Surface Mount	1.8 V 2.75 V 3.3 V	ARM926EJ-S	289-TFBGA	LPDDR	289-NFBGA (12x12)	Keyboard LCD	Cryptography Random Number Generator	1	100 Mbps	10 Mbps	1-Wire/HDQ AC97 I2C I2S IrDA McBSP MCSI Microwire MMC/SD/SDIO SPI UART	192 MHz	-40 °C	85 °C		USB 1.1 (1) USB 1.x (2)
Texas Instruments OMAP5912ZVLR	1 Core 32 Bit	C55x CP15 Signal Processing System Control	Surface Mount	1.8 V 2.75 V 3.3 V	ARM926EJ-S	289-TFBGA	LPDDR	289-NFBGA (12x12)	Keyboard LCD	Cryptography Random Number Generator	1	100 Mbps	10 Mbps	1-Wire/HDQ AC97 I2C I2S IrDA McBSP MCSI Microwire MMC/SD/SDIO SPI UART	192 MHz	-40 °C	85 °C		USB 1.1 (1) USB 1.x (2)

Catalog

Applications processor

Key Features

• Low-Power, High-Performance CMOS Technology0.13-µm Technology192-MHz Maximum Frequency1.6 ± 5% V Core VoltageARM926EJ-S™ (MPU) CoreSupport for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets16K-Byte Instruction Cache8K-Byte Data CacheData and Program Memory Management Unit (MMU)17-Word Write BufferTwo 64-Entry Translation Look-Aside Buffers (TLBs) for MMUsTMS320C55x™ (C55x™) DSP CoreOne/Two Instructions Executed per CycleDual Multipliers (Two Multiply-Accumulates per Cycle)Two Arithmetic/Logic UnitsFive Internal Data/Operand Buses (3 Read Buses and 2 Write Buses)32K x 16-Bit On-Chip Dual-Access RAM (DARAM) (64K Bytes)48K x 16-Bit On-Chip Single-Access RAM (SARAM) (96K Bytes)Instruction Cache (24K Bytes)Video Hardware Accelerators for DCT, iDCT, Pixel Interpolation, and Motion Estimation for Video Compression250K Bytes of Shared Internal SRAMMemory Traffic Controller (TC)16-Bit EMIFS Supports up to 256M Bytes of External Memory (i.e., Async. ROM/RAM, NOR/NAND Flash, and Sync. Burst Flash)16-Bit EMIFF to Access up to 64M Bytes of SDRAM, Mobile SDRAM, or Mobile DDRDSP Memory Management UnitDSP PeripheralsThree 32-Bit Timers and Watchdog TimerSix-Channel DMA ControllerTwo Multichannel Buffered Serial PortsTwo Multichannel Serial InterfacesMPU PeripheralsThree 32-Bit Timers and Watchdog TimerUSB 1.1 Host and Client ControllersUSB On-the-Go (OTG) Controller3 USB Ports, One With an Integrated TransceiverCamera Interface for Parallel CMOS SensorsReal-Time Clock (RTC)Pulse-Width Tone (PWT) InterfacePulse-Width Light (PWL) InterfaceKeyboard Matrix Interface (6 x 5 or 8 x 8)HDQ/1-Wire® InterfaceMultimedia Card (MMC) and Secure Digital (SD) InterfaceUp to 16 MPU General-Purpose I/OsTwo LED Pulse Generators (LPGs)ETM9™ Trace Module for ARM926EJ-S Debug16-/18-Bit LCD Controller With Dedicated System DMA Channel32-kHz Operating System (OS) TimerShared Peripherals8 General-Purpose TimersSerial Port Interface (SPI)Three Universal Asynchronous Receiver/Transmitters (UARTs) (Two Supporting SIR mode for IrDA)Inter-Integrated Circuit (I2C) Master and Slave InterfaceMultimedia Card (MMC) and Secure Digital (SD) InterfaceMultichannel Buffered Serial PortUp to 64 Shared General-Purpose I/Os32-kHz Synchro CounterEndian Conversion UnitHardware Accelerators for Cryptographic FunctionsRandom Number GenerationDES and 3DESSHA-1 and MD5Individual Power-Saving Modes for MPU/DSP/TCOn-Chip Scan-Based Emulation LogicIEEE Std 1149.1(JTAG) Boundary Scan LogicThree 289-Ball BGA (Ball Grid Array) Packages (ZDY and ZZG - Lead-Free; GDY - With Lead)The OMAP5912 device is targeted at the following applications:Applications Processing DevicesMobile CommunicationsWAN 802.11XBluetooth™GSM, GPRS, EDGECDMAVideo and Image Processing (MPEG4, JPEG, Windows® Media Video, etc.)Advanced Speech Applications (text-to-speech, speech recognition)Audio Processing (MPEG-1 Audio Layer3 [MP3], AMR, WMA, AAC, and Other GSM Speech Codecs)Graphics and Video AccelerationGeneralized Web AccessData ProcessingIEEE Standard 1149.1-1990 Standard Test-Access Port and Boundary Scan Architecture.TMS320C55x, C55x, OMAP, and DSP/BIOS are trademarks of Texas Instruments.ARM926EJ-S and ETM9 are trademarks of ARM Limited in the EU and other countries.Thumb and ARM are registered trademarks of ARM Limited in the EU and other countries.1-Wire is a registered trademark of Dallas Semiconductor Corporation.Bluetooth is a trademark owned by Bluetooth SIG, Inc.Windows is a registered trademark of Microsoft Corporation in the United States and/or other countries.Low-Power, High-Performance CMOS Technology0.13-µm Technology192-MHz Maximum Frequency1.6 ± 5% V Core VoltageARM926EJ-S™ (MPU) CoreSupport for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets16K-Byte Instruction Cache8K-Byte Data CacheData and Program Memory Management Unit (MMU)17-Word Write BufferTwo 64-Entry Translation Look-Aside Buffers (TLBs) for MMUsTMS320C55x™ (C55x™) DSP CoreOne/Two Instructions Executed per CycleDual Multipliers (Two Multiply-Accumulates per Cycle)Two Arithmetic/Logic UnitsFive Internal Data/Operand Buses (3 Read Buses and 2 Write Buses)32K x 16-Bit On-Chip Dual-Access RAM (DARAM) (64K Bytes)48K x 16-Bit On-Chip Single-Access RAM (SARAM) (96K Bytes)Instruction Cache (24K Bytes)Video Hardware Accelerators for DCT, iDCT, Pixel Interpolation, and Motion Estimation for Video Compression250K Bytes of Shared Internal SRAMMemory Traffic Controller (TC)16-Bit EMIFS Supports up to 256M Bytes of External Memory (i.e., Async. ROM/RAM, NOR/NAND Flash, and Sync. Burst Flash)16-Bit EMIFF to Access up to 64M Bytes of SDRAM, Mobile SDRAM, or Mobile DDRDSP Memory Management UnitDSP PeripheralsThree 32-Bit Timers and Watchdog TimerSix-Channel DMA ControllerTwo Multichannel Buffered Serial PortsTwo Multichannel Serial InterfacesMPU PeripheralsThree 32-Bit Timers and Watchdog TimerUSB 1.1 Host and Client ControllersUSB On-the-Go (OTG) Controller3 USB Ports, One With an Integrated TransceiverCamera Interface for Parallel CMOS SensorsReal-Time Clock (RTC)Pulse-Width Tone (PWT) InterfacePulse-Width Light (PWL) InterfaceKeyboard Matrix Interface (6 x 5 or 8 x 8)HDQ/1-Wire® InterfaceMultimedia Card (MMC) and Secure Digital (SD) InterfaceUp to 16 MPU General-Purpose I/OsTwo LED Pulse Generators (LPGs)ETM9™ Trace Module for ARM926EJ-S Debug16-/18-Bit LCD Controller With Dedicated System DMA Channel32-kHz Operating System (OS) TimerShared Peripherals8 General-Purpose TimersSerial Port Interface (SPI)Three Universal Asynchronous Receiver/Transmitters (UARTs) (Two Supporting SIR mode for IrDA)Inter-Integrated Circuit (I2C) Master and Slave InterfaceMultimedia Card (MMC) and Secure Digital (SD) InterfaceMultichannel Buffered Serial PortUp to 64 Shared General-Purpose I/Os32-kHz Synchro CounterEndian Conversion UnitHardware Accelerators for Cryptographic FunctionsRandom Number GenerationDES and 3DESSHA-1 and MD5Individual Power-Saving Modes for MPU/DSP/TCOn-Chip Scan-Based Emulation LogicIEEE Std 1149.1(JTAG) Boundary Scan LogicThree 289-Ball BGA (Ball Grid Array) Packages (ZDY and ZZG - Lead-Free; GDY - With Lead)The OMAP5912 device is targeted at the following applications:Applications Processing DevicesMobile CommunicationsWAN 802.11XBluetooth™GSM, GPRS, EDGECDMAVideo and Image Processing (MPEG4, JPEG, Windows® Media Video, etc.)Advanced Speech Applications (text-to-speech, speech recognition)Audio Processing (MPEG-1 Audio Layer3 [MP3], AMR, WMA, AAC, and Other GSM Speech Codecs)Graphics and Video AccelerationGeneralized Web AccessData ProcessingIEEE Standard 1149.1-1990 Standard Test-Access Port and Boundary Scan Architecture.TMS320C55x, C55x, OMAP, and DSP/BIOS are trademarks of Texas Instruments.ARM926EJ-S and ETM9 are trademarks of ARM Limited in the EU and other countries.Thumb and ARM are registered trademarks of ARM Limited in the EU and other countries.1-Wire is a registered trademark of Dallas Semiconductor Corporation.Bluetooth is a trademark owned by Bluetooth SIG, Inc.Windows is a registered trademark of Microsoft Corporation in the United States and/or other countries.

Description

OMAP5912 is a highly integrated hardware and software platform, designed to meet the application processing needs of next-generation embedded devices. The OMAP™ platform enables OEMs and ODMs to quickly bring to market devices featuring rich user interfaces, high processing performance, and long battery life through the maximum flexibility of a fully integrated mixed processor solution. The dual-core architecture provides benefits of both DSP and reduced instruction set computer (RISC)technologies, incorporating a TMS320C55x DSP core and a high-performance ARM926EJ-S ARM® core. OMAP5912 is a highly integrated hardware and software platform, designed to meet the application processing needs of next-generation embedded devices. The OMAP™ platform enables OEMs and ODMs to quickly bring to market devices featuring rich user interfaces, high processing performance, and long battery life through the maximum flexibility of a fully integrated mixed processor solution. The dual-core architecture provides benefits of both DSP and reduced instruction set computer (RISC)technologies, incorporating a TMS320C55x DSP core and a high-performance ARM926EJ-S ARM® core.