MC10EL05 Series

5.0 V ECL 2-Input Differential AND/NAND Gate

Catalog

5.0 V ECL 2-Input Differential AND/NAND Gate

Part	Number of Inputs	Supplier Device Package	Output Type	Package / Case	Package / Case [custom]	Package / Case	Mounting Type	Logic Type	Number of Circuits	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [y]	Package / Case [x]
ON Semiconductor MC10EL05DTG	4	8-TSSOP	Differential	8-MSOP 8-TSSOP	0.118 in	3 mm	Surface Mount	AND/NAND Gate	1	5.7 V	4.2 V	85 °C	-40 °C
ON Semiconductor MC10EL05DR2G	4	8-SOIC	Differential	8-SOIC			Surface Mount	AND/NAND Gate	1	5.7 V	4.2 V	85 °C	-40 °C	3.9 mm	0.154 in
ON Semiconductor MC10EL05DTR2G	4	8-TSSOP	Differential	8-MSOP 8-TSSOP	0.118 in	3 mm	Surface Mount	AND/NAND Gate	1	5.7 V	4.2 V	85 °C	-40 °C

Catalog

5.0 V ECL 2-Input Differential AND/NAND Gate

Key Features

• 275ps Propagation Delay

• ESD Protection: > 1 kV HBM, > 100 V MM

• PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V

• NECL Mode Operating Range: VCC= 0 V with VEE= -4.2 V to -5.7 V

• Internal Input Pulldown Resistors

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

• Moisture Sensitivity Level 1For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34

• Transistor Count = 44 devices

• Pb-Free Packages are Available

Description

The MC10EL/100EL05 is a 2-input differential AND/NAND gate. The device is functionally equivalent to the E404 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E404 the EL05 is ideally suited for those applications which require the ultimate in AC performance.Because a negative 2-input NAND is equivalent to a 2-input OR function, the differential inputs and outputs of the device allows the EL05 to also be used as a 2-input differential OR/NOR gate.The differential inputs employ clamp circuitry so that under open input conditions (pulled down to VEE) the input to the AND gate will be HIGH. In this way, if one set of inputs is open, the gate will remain active to the other input.The 100 Series contains temperature compensation.