
DRV8350R Series
102-V max 3-phase Functional Safety Quality-Managed smart gate driver
Manufacturer: Texas Instruments
Catalog
102-V max 3-phase Functional Safety Quality-Managed smart gate driver
Key Features
• 9 to 100-V, Triple half-bridge gate driverOptional integrated buck regulatorOptional triple low-side current shunt amplifiersSmart gate drive architectureAdjustable slew rate control for EMI performanceVGShandshake and minimum dead-time insertion to prevent shoot-through50-mA to 1-A peak source current100-mA to 2-A peak sink currentdV/dt mitigation through strong pulldownIntegrated gate driver power suppliesHigh-side doubler charge pump For 100% PWM duty cycle controlLow-side linear regulatorIntegratedLM5008Abuck regulator6 to 95-V operating voltage range2.5 to 75-V, 350-mA output capabilityIntegrated triple current shunt amplifiersAdjustable gain (5, 10, 20, 40 V/V)Bidirectional or unidirectional support6x, 3x, 1x, and independent PWM modesSupports 120° sensored operationSPI or hardware interface availableLow-power sleep mode (20 µA at VVM= 48-V)Integrated protection featuresVM undervoltage lockout (UVLO)Gate drive supply undervoltage (GDUV)MOSFET VDSovercurrent protection (OCP)MOSFET shoot-through preventionGate driver fault (GDF)Thermal warning and shutdown (OTW/OTSD)Fault condition indicator (nFAULT)9 to 100-V, Triple half-bridge gate driverOptional integrated buck regulatorOptional triple low-side current shunt amplifiersSmart gate drive architectureAdjustable slew rate control for EMI performanceVGShandshake and minimum dead-time insertion to prevent shoot-through50-mA to 1-A peak source current100-mA to 2-A peak sink currentdV/dt mitigation through strong pulldownIntegrated gate driver power suppliesHigh-side doubler charge pump For 100% PWM duty cycle controlLow-side linear regulatorIntegratedLM5008Abuck regulator6 to 95-V operating voltage range2.5 to 75-V, 350-mA output capabilityIntegrated triple current shunt amplifiersAdjustable gain (5, 10, 20, 40 V/V)Bidirectional or unidirectional support6x, 3x, 1x, and independent PWM modesSupports 120° sensored operationSPI or hardware interface availableLow-power sleep mode (20 µA at VVM= 48-V)Integrated protection featuresVM undervoltage lockout (UVLO)Gate drive supply undervoltage (GDUV)MOSFET VDSovercurrent protection (OCP)MOSFET shoot-through preventionGate driver fault (GDF)Thermal warning and shutdown (OTW/OTSD)Fault condition indicator (nFAULT)
Description
AI
The DRV835x family of devices are highly-integrated gate drivers for three-phase brushless DC (BLDC) motor applications. These applications include field-oriented control (FOC), sinusoidal current control, and trapezoidal current control of BLDC motors. The device variants provide optional integrated current shunt amplifiers to support different motor control schemes and a buck regulator to power the gate driver or external controller.
The DRV835x uses smart gate drive (SGD) architecture to decrease the number of external components that are typically necessary for MOSFET slew rate control and protection circuits. The SGD architecture also optimizes dead time to prevent shoot-through conditions, provides flexibility in decreasing electromagnetic interference (EMI) by MOSFET slew rate control, and protects against gate short circuit conditions through VGSmonitors. A strong gate pulldown circuit helps prevent unwanted dV/dt parasitic gate turn on events
Various PWM control modes (6x, 3x, 1x, and independent) are supported for simple interfacing to the external controller. These modes can decrease the number of outputs required of the controller for the motor driver PWM control signals. This family of devices also includes 1x PWM mode for simple sensored trapezoidal control of a BLDC motor by using an internal block commutation table.
The DRV835x family of devices are highly-integrated gate drivers for three-phase brushless DC (BLDC) motor applications. These applications include field-oriented control (FOC), sinusoidal current control, and trapezoidal current control of BLDC motors. The device variants provide optional integrated current shunt amplifiers to support different motor control schemes and a buck regulator to power the gate driver or external controller.
The DRV835x uses smart gate drive (SGD) architecture to decrease the number of external components that are typically necessary for MOSFET slew rate control and protection circuits. The SGD architecture also optimizes dead time to prevent shoot-through conditions, provides flexibility in decreasing electromagnetic interference (EMI) by MOSFET slew rate control, and protects against gate short circuit conditions through VGSmonitors. A strong gate pulldown circuit helps prevent unwanted dV/dt parasitic gate turn on events
Various PWM control modes (6x, 3x, 1x, and independent) are supported for simple interfacing to the external controller. These modes can decrease the number of outputs required of the controller for the motor driver PWM control signals. This family of devices also includes 1x PWM mode for simple sensored trapezoidal control of a BLDC motor by using an internal block commutation table.