Catalog
Sitara processor: Arm Cortex-A8, Ethernet
Key Features
• High-Performance Sitara™ ARM® ProcessorsARM Cortex®-A8 CoreARMv7 ArchitectureIn-Order, Dual-Issue, Superscalar Processor CoreNeon™ Multimedia ArchitectureSupports Integer and Floating PointJazelle® RCT Execution EnvironmentARM Cortex-A8 Memory Architecture32KB of Instruction and Data Caches512KB of L2 Cache64KB of RAM, 48KB of Boot ROM128KB of On-Chip Memory Controller (OCMC) RAMImaging Subsystem (ISS)Camera Sensor ConnectionParallel Connection for Raw (up to 16-Bit) and BT.656 or BT.1120 (8- and 16-Bit)Image Sensor Interface (ISIF) for Handling Image and Video Data From the Camera SensorResizerResizing Image and Video From 1/16x to 8xGenerating Two Different Resizing Outputs ConcurrentlyMedia ControllerControls the HDVPSS and ISSSGX530 3D Graphics EngineDelivers up to 25 MPoly/secUniversal Scalable Shader Engine (USSE™)Direct3D Mobile, OpenGLES 1.1 and 2.0, OpenVG 1.0, OpenMax API SupportAdvanced Geometry DMA-Driven OperationProgrammable HQ Image Anti-AliasingEndiannessARM Instructions and Data – Little EndianHD Video Processing Subsystem (HDVPSS)Two 165-MHz, 2-channel HD Video Capture ModulesOne 16- or 24-Bit Input or Dual 8-Bit SD Input ChannelsOne 8-, 16-, or 24-Bit Input and One 8-Bit Only Input ChannelsTwo 165-MHz HD Video Display OutputsOne 16-, 24-, or 30-Bit Output and One 16- or 24-Bit OutputComposite or S-Video Analog OutputMacrovision® Support AvailableDigital HDMI 1.3 Transmitter With Integrated PHYAdvanced Video Processing Features Such as Scan, Format, Rate ConversionThree Graphics Layers and CompositorsDual 32-Bit DDR2/DDR3 SDRAM InterfacesSupports up to DDR2-800 and DDR3-1066Up to Eight x 8 Devices Comprise 2GB of the Total Address SpaceDynamic Memory Manager (DMM)Programmable Multizone Memory Mapping and InterleavingEnables Efficient 2D Block AccessesSupports Tiled Objects in 0°, 90°, 180°, or 270° Orientation and MirroringOptimizes Interlaced AccessesGeneral-Purpose Memory Controller (GPMC)8- or 16-Bit Multiplexed Address and Data Bus512MB of Address Space Divided Among up to 8 Chip SelectsGlueless Interface to NOR Flash, NAND Flash (BCH/Hamming Error Code Detection), SRAM and Pseudo-SRAMError Locator Module (ELM) Outside of GPMC to Provide up to 16-Bit or 512-Byte Hardware ECC for NANDFlexible Asynchronous Protocol Control for Interface to FPGA, CPLD, ASICs, and so ForthEnhanced Direct Memory Access (EDMA) ControllerFour Transfer Controllers64 Independent DMA Channels and 8 Independent QDMA ChannelsDual-Port Ethernet (10/100/1000 Mbps) With Optional SwitchIEEE 802.3 Compliant (3.3-V I/O Only)MII/RMII/GMII/RGMII Media Independent InterfacesManagement Data I/O (MDIO) ModuleReset IsolationIEEE 1588 Time-Stamping and Industrial Ethernet ProtocolsDual USB 2.0 Ports With Integrated PHYsUSB2.0 High- and Full-Speed ClientsUSB2.0 High-, Full-, and Low-Speed Hosts, or OTGSupports End-point 0–15One PCI-Express 2.0 Port With Integrated PHYSingle Port With One Lane at 5.0 GT/sConfigurable as Root Complex or End-pointEight 32-Bit General-Purpose Timers (Timer1–Timer8)One System Watchdog Timer (WDT0)Six Configurable UART/IrDA/CIR ModulesUART0 With Modem Control SignalsSupports up to 3.6864 Mbps UART0/1/2Supports up to 12 Mbps UART3/4/5SIR, MIR, FIR (4.0 MBAUD), and CIRFour Serial Peripheral Interfaces (SPIs) (up to48 MHz)Each With Four Chip SelectsThree MMC/SD/SDIO Serial Interfaces (up to48 MHz)Three Supporting up to 1-, 4-, or 8-Bit ModesDual Controller Area Network (DCAN) ModulesCAN Version 2 Part A, BFour Inter-Integrated Circuit (I2C Bus) PortsSix Multichannel Audio Serial Ports (McASPs)Dual 10 Serializer Transmit and Receive PortsQuad Four Serializer Transmit and Receive PortsDIT-Capable For S/PDIF (All Ports)Multichannel Buffered Serial Port (McBSP)Transmit and Receive Clocks up to 48 MHzTwo Clock Zones and Two Serial Data PinsSupports TDM, I2S, and Similar FormatsSerial ATA (SATA) 3.0 Gbps Controller With Integrated PHYDirect Interface to One Hard Disk DriveHardware-Assisted Native Command Queuing (NCQ) from up to 32 EntriesSupports Port Multiplier and Command-Based SwitchingReal-Time Clock (RTC)One-Time or Periodic Interrupt GenerationUp to 128 General-Purpose I/O (GPIO) PinsOne Spin Lock Module With up to 128 Hardware SemaphoresOne Mailbox Module With 12 MailboxesOn-Chip ARM ROM Bootloader (RBL)Power, Reset, and Clock ManagementMultiple Independent Core Power DomainsMultiple Independent Core Voltage DomainsSupport for Three Operating Points (OPP100, OPP120, OPP166) per Voltage DomainClock Enable and Disable Control for Subsystems and Peripherals32KB of Embedded Trace Buffer (ETB) and5-Pin Trace Interface for DebugIEEE 1149.1 (JTAG) Compatible684-Pin Pb-Free BGA Package (CYE Suffix),0.8-mm Ball Pitch With Via Channel Technology to Reduce PCB Cost45-nm CMOS Technology1.8- and 3.3-V Dual Voltage Buffers for General I/OAll trademarks are the property of their respective owners.High-Performance Sitara™ ARM® ProcessorsARM Cortex®-A8 CoreARMv7 ArchitectureIn-Order, Dual-Issue, Superscalar Processor CoreNeon™ Multimedia ArchitectureSupports Integer and Floating PointJazelle® RCT Execution EnvironmentARM Cortex-A8 Memory Architecture32KB of Instruction and Data Caches512KB of L2 Cache64KB of RAM, 48KB of Boot ROM128KB of On-Chip Memory Controller (OCMC) RAMImaging Subsystem (ISS)Camera Sensor ConnectionParallel Connection for Raw (up to 16-Bit) and BT.656 or BT.1120 (8- and 16-Bit)Image Sensor Interface (ISIF) for Handling Image and Video Data From the Camera SensorResizerResizing Image and Video From 1/16x to 8xGenerating Two Different Resizing Outputs ConcurrentlyMedia ControllerControls the HDVPSS and ISSSGX530 3D Graphics EngineDelivers up to 25 MPoly/secUniversal Scalable Shader Engine (USSE™)Direct3D Mobile, OpenGLES 1.1 and 2.0, OpenVG 1.0, OpenMax API SupportAdvanced Geometry DMA-Driven OperationProgrammable HQ Image Anti-AliasingEndiannessARM Instructions and Data – Little EndianHD Video Processing Subsystem (HDVPSS)Two 165-MHz, 2-channel HD Video Capture ModulesOne 16- or 24-Bit Input or Dual 8-Bit SD Input ChannelsOne 8-, 16-, or 24-Bit Input and One 8-Bit Only Input ChannelsTwo 165-MHz HD Video Display OutputsOne 16-, 24-, or 30-Bit Output and One 16- or 24-Bit OutputComposite or S-Video Analog OutputMacrovision® Support AvailableDigital HDMI 1.3 Transmitter With Integrated PHYAdvanced Video Processing Features Such as Scan, Format, Rate ConversionThree Graphics Layers and CompositorsDual 32-Bit DDR2/DDR3 SDRAM InterfacesSupports up to DDR2-800 and DDR3-1066Up to Eight x 8 Devices Comprise 2GB of the Total Address SpaceDynamic Memory Manager (DMM)Programmable Multizone Memory Mapping and InterleavingEnables Efficient 2D Block AccessesSupports Tiled Objects in 0°, 90°, 180°, or 270° Orientation and MirroringOptimizes Interlaced AccessesGeneral-Purpose Memory Controller (GPMC)8- or 16-Bit Multiplexed Address and Data Bus512MB of Address Space Divided Among up to 8 Chip SelectsGlueless Interface to NOR Flash, NAND Flash (BCH/Hamming Error Code Detection), SRAM and Pseudo-SRAMError Locator Module (ELM) Outside of GPMC to Provide up to 16-Bit or 512-Byte Hardware ECC for NANDFlexible Asynchronous Protocol Control for Interface to FPGA, CPLD, ASICs, and so ForthEnhanced Direct Memory Access (EDMA) ControllerFour Transfer Controllers64 Independent DMA Channels and 8 Independent QDMA ChannelsDual-Port Ethernet (10/100/1000 Mbps) With Optional SwitchIEEE 802.3 Compliant (3.3-V I/O Only)MII/RMII/GMII/RGMII Media Independent InterfacesManagement Data I/O (MDIO) ModuleReset IsolationIEEE 1588 Time-Stamping and Industrial Ethernet ProtocolsDual USB 2.0 Ports With Integrated PHYsUSB2.0 High- and Full-Speed ClientsUSB2.0 High-, Full-, and Low-Speed Hosts, or OTGSupports End-point 0–15One PCI-Express 2.0 Port With Integrated PHYSingle Port With One Lane at 5.0 GT/sConfigurable as Root Complex or End-pointEight 32-Bit General-Purpose Timers (Timer1–Timer8)One System Watchdog Timer (WDT0)Six Configurable UART/IrDA/CIR ModulesUART0 With Modem Control SignalsSupports up to 3.6864 Mbps UART0/1/2Supports up to 12 Mbps UART3/4/5SIR, MIR, FIR (4.0 MBAUD), and CIRFour Serial Peripheral Interfaces (SPIs) (up to48 MHz)Each With Four Chip SelectsThree MMC/SD/SDIO Serial Interfaces (up to48 MHz)Three Supporting up to 1-, 4-, or 8-Bit ModesDual Controller Area Network (DCAN) ModulesCAN Version 2 Part A, BFour Inter-Integrated Circuit (I2C Bus) PortsSix Multichannel Audio Serial Ports (McASPs)Dual 10 Serializer Transmit and Receive PortsQuad Four Serializer Transmit and Receive PortsDIT-Capable For S/PDIF (All Ports)Multichannel Buffered Serial Port (McBSP)Transmit and Receive Clocks up to 48 MHzTwo Clock Zones and Two Serial Data PinsSupports TDM, I2S, and Similar FormatsSerial ATA (SATA) 3.0 Gbps Controller With Integrated PHYDirect Interface to One Hard Disk DriveHardware-Assisted Native Command Queuing (NCQ) from up to 32 EntriesSupports Port Multiplier and Command-Based SwitchingReal-Time Clock (RTC)One-Time or Periodic Interrupt GenerationUp to 128 General-Purpose I/O (GPIO) PinsOne Spin Lock Module With up to 128 Hardware SemaphoresOne Mailbox Module With 12 MailboxesOn-Chip ARM ROM Bootloader (RBL)Power, Reset, and Clock ManagementMultiple Independent Core Power DomainsMultiple Independent Core Voltage DomainsSupport for Three Operating Points (OPP100, OPP120, OPP166) per Voltage DomainClock Enable and Disable Control for Subsystems and Peripherals32KB of Embedded Trace Buffer (ETB) and5-Pin Trace Interface for DebugIEEE 1149.1 (JTAG) Compatible684-Pin Pb-Free BGA Package (CYE Suffix),0.8-mm Ball Pitch With Via Channel Technology to Reduce PCB Cost45-nm CMOS Technology1.8- and 3.3-V Dual Voltage Buffers for General I/OAll trademarks are the property of their respective owners.
Description
AI
AM387x Sitara ARM processors are highly integrated, programmable platforms that leverage the Sitara processor technology.
The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly bring to market devices featuring robust operating systems support, rich user interfaces, and high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The device also combines programmable ARM processing with a highly integrated peripheral set.
The AM387x Sitara ARM processors also present OEMs and ODMs with new levels of processor scalability and software reuse. An OEM or ODM who used the AM387x processors in a design and can make a similar product with added features could scale up to the pin-compatible and software-compatible TMS320DM814x processors from TI. The TMS320DM814x DaVinci video processors add a powerful C674x core DSP along with a video encoder and decoder to the hardware on the AM387x. Additionally, OEMs or ODMs that have used the AM387x or DM814x processors and find a need for a faster ARM and/or DSP core performance could scale up to the software-compatible AM389x or TMS320DM816x devices with higher core speeds.
Programmability is provided by an ARM Cortex-A8 RISC CPU with Neon extension. The ARM processor lets developers keep control functions separate from algorithms programmed on coprocessors, thus reducing the complexity of the system software. The ARM Cortex-A8 32-bit RISC core with Neon floating-point extension includes: 32KB of instruction cache; 32KB of data cache; 512KB of L2 cache; 48KB of boot ROM; and 64KB of RAM.
The AM387x Sitara ARM processors also include an SGX530 3D graphics engine to off-load many graphics processing tasks from the ARM core, making more ARM MIPS available for common processing tasks on algorithms. Additionally, the AM387x processor has a complete set of development tools for the ARM which include C compilers and a Microsoft Windows debugger interface for visibility into source code execution.
AM387x Sitara ARM processors are highly integrated, programmable platforms that leverage the Sitara processor technology.
The device enables Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly bring to market devices featuring robust operating systems support, rich user interfaces, and high processing performance through the maximum flexibility of a fully integrated mixed processor solution. The device also combines programmable ARM processing with a highly integrated peripheral set.
The AM387x Sitara ARM processors also present OEMs and ODMs with new levels of processor scalability and software reuse. An OEM or ODM who used the AM387x processors in a design and can make a similar product with added features could scale up to the pin-compatible and software-compatible TMS320DM814x processors from TI. The TMS320DM814x DaVinci video processors add a powerful C674x core DSP along with a video encoder and decoder to the hardware on the AM387x. Additionally, OEMs or ODMs that have used the AM387x or DM814x processors and find a need for a faster ARM and/or DSP core performance could scale up to the software-compatible AM389x or TMS320DM816x devices with higher core speeds.
Programmability is provided by an ARM Cortex-A8 RISC CPU with Neon extension. The ARM processor lets developers keep control functions separate from algorithms programmed on coprocessors, thus reducing the complexity of the system software. The ARM Cortex-A8 32-bit RISC core with Neon floating-point extension includes: 32KB of instruction cache; 32KB of data cache; 512KB of L2 cache; 48KB of boot ROM; and 64KB of RAM.
The AM387x Sitara ARM processors also include an SGX530 3D graphics engine to off-load many graphics processing tasks from the ARM core, making more ARM MIPS available for common processing tasks on algorithms. Additionally, the AM387x processor has a complete set of development tools for the ARM which include C compilers and a Microsoft Windows debugger interface for visibility into source code execution.
