SN74LV132A Series

4-ch, 4-input, 2-V to 5.5-V NAND gates with Schmitt-Trigger inputs

Catalog

4-ch, 4-input, 2-V to 5.5-V NAND gates with Schmitt-Trigger inputs

Part	Logic Type	Input Logic Level - High [Max]	Input Logic Level - High [Min]	Input Logic Level - Low [Min]	Input Logic Level - Low [Max]	Voltage - Supply [Max]	Voltage - Supply [Min]	Supplier Device Package	Current - Quiescent (Max) [Max]	Features	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case [custom]	Package / Case [custom]	Package / Case	Operating Temperature [Min]	Operating Temperature [Max]	Number of Circuits	Mounting Type	Max Propagation Delay @ V, Max CL	Number of Inputs	Package / Case [x]	Package / Case [y]	Package / Case	Package / Case
Texas Instruments SN74LV132APW	NAND Gate	3.5 V	1.75 V	0.75 V	1.5 V	5.5 V	2 V	14-TSSOP	20 µA	Schmitt Trigger	12 mA	12 mA	0.173 "	4.4 mm	14-TSSOP	-40 °C	125 °C	4	Surface Mount	9.7 ns	2
Texas Instruments SN74LV132APWT	NAND Gate	3.5 V	1.75 V	0.75 V	1.5 V	5.5 V	2 V	14-TSSOP	20 µA	Schmitt Trigger	12 mA	12 mA	0.173 "	4.4 mm	14-TSSOP	-40 °C	125 °C	4	Surface Mount	9.7 ns	2
Texas Instruments SN74LV132APWE4	NAND Gate	3.5 V	1.75 V	0.75 V	1.5 V	5.5 V	2 V	14-TSSOP	20 µA	Schmitt Trigger	12 mA	12 mA	0.173 "	4.4 mm	14-TSSOP	-40 °C	125 °C	4	Surface Mount	9.7 ns	2
Texas Instruments SN74LV132ADRE4	NAND Gate	3.5 V	1.75 V	0.75 V	1.5 V	5.5 V	2 V		20 µA	Schmitt Trigger	12 mA	12 mA			14-SOIC	-40 °C	125 °C	4	Surface Mount	9.7 ns	2	0.154 in	3.9 mm
Texas Instruments SN74LV132ADBR	NAND Gate	3.5 V	1.75 V	0.75 V	1.5 V	5.5 V	2 V	14-SSOP	20 µA	Schmitt Trigger	12 mA	12 mA			14-SSOP	-40 °C	125 °C	4	Surface Mount	9.7 ns	2			5.3 mm	0.209 "
Texas Instruments SN74LV132APWRG4	NAND Gate	3.5 V	1.75 V	0.75 V	1.5 V	5.5 V	2 V	14-TSSOP	20 µA	Schmitt Trigger	12 mA	12 mA	0.173 "	4.4 mm	14-TSSOP	-40 °C	125 °C	4	Surface Mount	9.7 ns	2
Texas Instruments SN74LV132ANS
Texas Instruments SN74LV132AD	NAND Gate	3.5 V	1.75 V	0.75 V	1.5 V	5.5 V	2 V		20 µA	Schmitt Trigger	12 mA	12 mA			14-SOIC	-40 °C	125 °C	4	Surface Mount	9.7 ns	2	0.154 in	3.9 mm
Texas Instruments SN74LV132ADGVR	NAND Gate	3.5 V	1.75 V	0.75 V	1.5 V	5.5 V	2 V		20 µA	Schmitt Trigger	12 mA	12 mA			14-TFSOP	-40 °C	125 °C	4	Surface Mount	9.7 ns	2	0.173 in 4.4 mm

Catalog

4-ch, 4-input, 2-V to 5.5-V NAND gates with Schmitt-Trigger inputs

Key Features

• 2-V to 5.5-V VCCOperationMax tpdof 9 ns at 5 VTypical VOLP(Output Ground Bounce) <0.8 V atVCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2.3 V atVCC= 3.3 V, TA= 25°CSupport Mixed-Mode Voltage Operation on AllPortsLatch-Up Performance Exceeds 250 mA perJESD 17IoffSupports Live Insertion, Partial Power-DownMode, and Back Drive ProtectionESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)APPLICATIONSIndustrial PC: Rugged PC and LaptopAccess Control and Security: CameraSurveillance IP NetworkVending, Payment and Change MachinesPatient Monitoring STB / DVR / Streaming Media(Withdraw)Other Motor Drives (Such as Switch Reluctance)All other trademarks are the property of their respective owners2-V to 5.5-V VCCOperationMax tpdof 9 ns at 5 VTypical VOLP(Output Ground Bounce) <0.8 V atVCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2.3 V atVCC= 3.3 V, TA= 25°CSupport Mixed-Mode Voltage Operation on AllPortsLatch-Up Performance Exceeds 250 mA perJESD 17IoffSupports Live Insertion, Partial Power-DownMode, and Back Drive ProtectionESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)APPLICATIONSIndustrial PC: Rugged PC and LaptopAccess Control and Security: CameraSurveillance IP NetworkVending, Payment and Change MachinesPatient Monitoring STB / DVR / Streaming Media(Withdraw)Other Motor Drives (Such as Switch Reluctance)All other trademarks are the property of their respective owners

Description

The ’LV132A devices are quadruple positive-NAND gates designed for 2-V to 5.5-V VCCoperation. The ’LV132A devices perform the Boolean function Y =A • Bor Y =A+Bin positive logic. Each circuit functions as a NAND gate, but because of the Schmitt trigger, it has different input threshold levels for positive- and negative-going signals. These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals. The ’LV132A devices are quadruple positive-NAND gates designed for 2-V to 5.5-V VCCoperation. The ’LV132A devices perform the Boolean function Y =A • Bor Y =A+Bin positive logic. Each circuit functions as a NAND gate, but because of the Schmitt trigger, it has different input threshold levels for positive- and negative-going signals. These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.