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DS90LV032A

DS90LV032A Series

3-V 400-Mbps LVDS quad differential line receiver

Manufacturer: Texas Instruments

Catalog

3-V 400-Mbps LVDS quad differential line receiver

Key Features

>400 Mbps (200 MHz) Switching Rates0.1-ns Channel-to-Channel Skew (Typical)0.1-ns Differential Skew (Typical)3.3-ns Maximum Propagation Delay3.3-V Power Supply DesignPower Down High Impedance on LVDS InputsLow Power Design (40 mW at 3.3 V Static)Interoperable With Existing 5-V LVDS NetworksAccepts Small Swing (350 mV Typical) VIDSupports Open, Short, and Terminated Input Fail-SafeCompatible With ANSI/TIA/EIA-644Industrial Temperature Operating Range (–40°C to 85°C)Available in SOIC and TSSOP Packaging>400 Mbps (200 MHz) Switching Rates0.1-ns Channel-to-Channel Skew (Typical)0.1-ns Differential Skew (Typical)3.3-ns Maximum Propagation Delay3.3-V Power Supply DesignPower Down High Impedance on LVDS InputsLow Power Design (40 mW at 3.3 V Static)Interoperable With Existing 5-V LVDS NetworksAccepts Small Swing (350 mV Typical) VIDSupports Open, Short, and Terminated Input Fail-SafeCompatible With ANSI/TIA/EIA-644Industrial Temperature Operating Range (–40°C to 85°C)Available in SOIC and TSSOP Packaging

Description

AI
The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology. The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100 Ω) input Fail-safe. The receiver output is HIGH for all fail-safe conditions. The DS90LV032A and companion LVDS line driver (for example, DS90LV031A) provide a new alternative to high power PECL or ECL devices for high speed point-to-point interface applications. The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology. The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3-V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports open, shorted, and terminated (100 Ω) input Fail-safe. The receiver output is HIGH for all fail-safe conditions. The DS90LV032A and companion LVDS line driver (for example, DS90LV031A) provide a new alternative to high power PECL or ECL devices for high speed point-to-point interface applications.