CDC340 Series

1-to-8 TTL clock driver with output control pins for high state

Catalog

1-to-8 TTL clock driver with output control pins for high state

Part	Output	Supplier Device Package	Mounting Type	Differential - Input:Output	Ratio - Input:Output	Number of Circuits	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case	Package / Case [y]	Package / Case [y]	Input	Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Frequency - Max [Max]
Texas Instruments CDC340DW	TTL	20-SOIC	Surface Mount		1:8	1	70 °C	0 °C	20-SOIC	0.295 in	7.5 mm	TTL	Fanout Buffer (Distribution)	4.75 V	5.25 V	80 MHz
Texas Instruments CDC340DWRG4	TTL	20-SOIC	Surface Mount		1:8	1	70 °C	0 °C	20-SOIC	0.295 in	7.5 mm	TTL	Fanout Buffer (Distribution)	4.75 V	5.25 V	80 MHz

Catalog

1-to-8 TTL clock driver with output control pins for high state

Key Features

• Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation ApplicationsTTL-Compatible Inputs and OutputsDistributes One Clock Input to Eight OutputsDistributed VCCand Ground Pins Reduce Switching NoiseHigh-Drive Outputs (-48-mA IOH, 48-mA IOL)State-of-the-ArtEPIC-IIBTMBiCMOS Design Significantly Reduces Power DissipationPackage Options Include Plastic Small-Outline (DW) and ShrinkEPIC-IIB is a trademark of Texas Instruments Incorporated.Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation ApplicationsTTL-Compatible Inputs and OutputsDistributes One Clock Input to Eight OutputsDistributed VCCand Ground Pins Reduce Switching NoiseHigh-Drive Outputs (-48-mA IOH, 48-mA IOL)State-of-the-ArtEPIC-IIBTMBiCMOS Design Significantly Reduces Power DissipationPackage Options Include Plastic Small-Outline (DW) and ShrinkEPIC-IIB is a trademark of Texas Instruments Incorporated.

Description

The CDC340 is a high-performance clock-driver circuit that distributes one (A) input signal to eight (Y) outputs with minimum skew for clock distribution. Through the use of the control pins (1G and 2G), the outputs can be placed in a high state regardless of the A input. The propagation delays are adjusted at the factory using the P0 and P1 pins. These pins are not intended for customer use and should be strapped to GND. The CDC340 is characterized for operation from 0°C to 70°C. The CDC340 is a high-performance clock-driver circuit that distributes one (A) input signal to eight (Y) outputs with minimum skew for clock distribution. Through the use of the control pins (1G and 2G), the outputs can be placed in a high state regardless of the A input. The propagation delays are adjusted at the factory using the P0 and P1 pins. These pins are not intended for customer use and should be strapped to GND. The CDC340 is characterized for operation from 0°C to 70°C.