SN74CBTLV3857 Series

3.3-V, 1:1 (SPST), 10-channel FET bus switch with internal pulldown resistors

Catalog

3.3-V, 1:1 (SPST), 10-channel FET bus switch with internal pulldown resistors

Part	Supplier Device Package	Type	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Circuit	Circuit	Voltage Supply Source	Independent Circuits	Package / Case	Package / Case	Package / Case [custom]	Package / Case [custom]	Package / Case [y]	Package / Case [y]
Texas Instruments SN74CBTLV3857PWR	24-TSSOP	Bus Switch	Surface Mount	3.6 V	3 V	85 °C	-40 °C	10	1:1	Single Supply	1	24-TSSOP	0.173 in 4.4 mm
Texas Instruments SN74CBTLV3857DWG4	24-SOIC	Bus Switch	Surface Mount	3.6 V	3 V	85 °C	-40 °C	10	1:1	Single Supply	1	24-SOIC		7.5 mm	0.295 in
Texas Instruments SN74CBTLV3857DWE4	24-SOIC	Bus Switch	Surface Mount	3.6 V	3 V	85 °C	-40 °C	10	1:1	Single Supply	1	24-SOIC		7.5 mm	0.295 in
Texas Instruments SN74CBTLV3857DBQR	24-SSOP	Bus Switch	Surface Mount	3.6 V	3 V	85 °C	-40 °C	10	1:1	Single Supply	1	24-SSOP		0.154 " 3.9 mm
Texas Instruments 74CBTLV3857DBQRG4	24-SSOP	Bus Switch	Surface Mount	3.6 V	3 V	85 °C	-40 °C	10	1:1	Single Supply	1	24-SSOP		0.154 " 3.9 mm
Texas Instruments 74CBTLV3857DBQRE4	24-SSOP	Bus Switch	Surface Mount	3.6 V	3 V	85 °C	-40 °C	10	1:1	Single Supply	1	24-SSOP		0.154 " 3.9 mm
Texas Instruments SN74CBTLV3857DW	24-SOIC	Bus Switch	Surface Mount	3.6 V	3 V	85 °C	-40 °C	10	1:1	Single Supply	1	24-SOIC		7.5 mm	0.295 in
Texas Instruments SN74CBTLV3857DWR	24-SOIC	Bus Switch	Surface Mount	3.6 V	3 V	85 °C	-40 °C	10	1:1	Single Supply	1	24-SOIC		7.5 mm	0.295 in
Texas Instruments SN74CBTLV3857DGVR	24-TVSOP	Bus Switch	Surface Mount	3.6 V	3 V	85 °C	-40 °C	10	1:1	Single Supply	1	24-TFSOP				4.4 mm	0.173 in

Catalog

3.3-V, 1:1 (SPST), 10-channel FET bus switch with internal pulldown resistors

Key Features

• Enable Signal Is SSTL_2 CompatibleFlow-Through Architecture Optimizes PCB LayoutDesigned for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM ApplicationsSwitch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAMInternal 10-kPulldown Resistors to Ground on B PortInternal 50-kPullup Resistor on Output-Enable InputRail-to-Rail Switching on Data I/O PortsIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIEnable Signal Is SSTL_2 CompatibleFlow-Through Architecture Optimizes PCB LayoutDesigned for Use With 200 Mbit/s Double Data-Rate (DDR) SDRAM ApplicationsSwitch On-State Resistance Is Designed to Eliminate Series Resistor to DDR SDRAMInternal 10-kPulldown Resistors to Ground on B PortInternal 50-kPullup Resistor on Output-Enable InputRail-to-Rail Switching on Data I/O PortsIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class II

Description

This 10-bit FET bus switch is designed for 3-V to 3.6-V VCCoperation and SSTL_2 output-enable (OE\) input levels. When OE\ is low, the 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports. There are 10-kpulldown resistors to ground on the B port. The FET switch on-state resistance is designed to replace the series terminating resistor in the SSTL_2 data path. This device is fully specified for partial-power-down applications using Ioff. The Iofffeature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off. This 10-bit FET bus switch is designed for 3-V to 3.6-V VCCoperation and SSTL_2 output-enable (OE\) input levels. When OE\ is low, the 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports. There are 10-kpulldown resistors to ground on the B port. The FET switch on-state resistance is designed to replace the series terminating resistor in the SSTL_2 data path. This device is fully specified for partial-power-down applications using Ioff. The Iofffeature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.