SN74HCS596-Q1 Series

Automotive 8-bit serial-in/parallel-out shift register

Catalog

Automotive 8-bit serial-in/parallel-out shift register

Part	Logic Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Supplier Device Package	Number of Bits per Element	Operating Temperature [Min]	Operating Temperature [Max]	Output Type	Function	Number of Elements	Mounting Type	Package / Case	Package / Case [x]	Package / Case [y]	Qualification	Grade
Texas Instruments SN74HCS596DR	Shift Register	2 V	6 V	16-SOIC	8	-40 °C	125 °C	Open Drain	Serial to Parallel	1	Surface Mount	16-SOIC	0.154 in	3.9 mm
Texas Instruments SN74HCS596QDRQ1	Shift Register	2 V	6 V	16-SOIC	8	-40 °C	125 °C	Open Drain	Serial to Parallel	1	Surface Mount	16-SOIC	0.154 in	3.9 mm	AEC-Q100	Automotive
Texas Instruments SN74HCS596QPWRQ1	Shift Register	2 V	6 V	16-TSSOP	8	-40 °C	125 °C	Open Drain	Serial to Parallel	1	Surface Mount	16-TSSOP	0.173 in	4.4 mm	AEC-Q100	Automotive
Texas Instruments SN74HCS596PWR	Shift Register	2 V	6 V	16-TSSOP	8	-40 °C	125 °C	Open Drain	Serial to Parallel	1	Surface Mount	16-TSSOP	0.173 in	4.4 mm

Catalog

Automotive 8-bit serial-in/parallel-out shift register

Key Features

• AEC-Q100 Qualified for automotive applications:Device temperature grade 1: –40°C to +125°C, TADevice HBM ESD Classification Level 2Device CDM ESD Classifcation Level C6Wide operating voltage range: 2 V to 6 VSchmitt-trigger inputs allow for slow or noisy input signalsLow power consumptionTypical ICCof 100 nATypical input leakage current of ±100 nA±7.8-mA output drive at 6 VAEC-Q100 Qualified for automotive applications:Device temperature grade 1: –40°C to +125°C, TADevice HBM ESD Classification Level 2Device CDM ESD Classifcation Level C6Wide operating voltage range: 2 V to 6 VSchmitt-trigger inputs allow for slow or noisy input signalsLow power consumptionTypical ICCof 100 nATypical input leakage current of ±100 nA±7.8-mA output drive at 6 V

Description

The SN74HCS596-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the outputs are in a high-impedance state. Internal register data is not impacted by the operation of theOEinput. The SN74HCS596-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-triggers, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel open-drain outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the outputs are in a high-impedance state. Internal register data is not impacted by the operation of theOEinput.