
Catalog
4-ch, 2-V to 5.5-V buffers with 3-state outputs
Key Features
• 2-V to 5.5-V VCCOperationMax tpdof 6 ns at 5 VTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) > 2.3 V at VCC= 3.3 V, TA= 25°CSupport Mixed-Mode Voltage Operation on All PortsIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 224000-V Human-Body Model200-V Machine Model2000-V Charged-Device Model2-V to 5.5-V VCCOperationMax tpdof 6 ns at 5 VTypical VOLP(Output Ground Bounce) < 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) > 2.3 V at VCC= 3.3 V, TA= 25°CSupport Mixed-Mode Voltage Operation on All PortsIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 224000-V Human-Body Model200-V Machine Model2000-V Charged-Device Model
Description
AI
The SN74LV125A quadruple bus buffer gate is designed for 2-V to 5.5-V VCCoperation.
The SN74LV125A quadruple bus buffer gate is designed for 2-V to 5.5-V VCCoperation.