CD4021B-Q1 Series

Automotive Catalog CMOS 8-Stage Static Shift Register

Catalog

Automotive Catalog CMOS 8-Stage Static Shift Register

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Number of Bits per Element	Supplier Device Package	Package / Case	Package / Case [x]	Package / Case [y]	Mounting Type	Operating Temperature [Min]	Operating Temperature [Max]	Function	Logic Type	Output Type	Number of Elements	Package / Case	Package / Case	Qualification	Grade
Texas Instruments CD4021BM96	18 V	3 V	8	16-SOIC	16-SOIC	0.154 in	3.9 mm	Surface Mount	-55 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1
Texas Instruments CD4021BM	18 V	3 V	8	16-SOIC	16-SOIC	0.154 in	3.9 mm	Surface Mount	-55 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1
Texas Instruments CD4021BNSR	18 V	3 V	8	16-SO	16-SOIC			Surface Mount	-55 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1	0.209 "	5.3 mm
Texas Instruments CD4021BNSRE4	18 V	3 V	8	16-SO	16-SOIC			Surface Mount	-55 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1	0.209 "	5.3 mm
Texas Instruments CD4021BM96E4	18 V	3 V	8	16-SOIC	16-SOIC	0.154 in	3.9 mm	Surface Mount	-55 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1
Texas Instruments CD4021BQDRQ1	18 V	3 V	8	16-SOIC	16-SOIC	0.154 in	3.9 mm	Surface Mount	-40 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1			AEC-Q100	Automotive
Texas Instruments CD4021BPWRG4	18 V	3 V	8	16-TSSOP	16-TSSOP	0.173 in	4.4 mm	Surface Mount	-55 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1
Texas Instruments CD4021BEG4	18 V	3 V	8	16-PDIP	16-DIP			Through Hole	-55 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1	0.3 in	7.62 mm
Texas Instruments CD4021BPWR	18 V	3 V	8	16-TSSOP	16-TSSOP	0.173 in	4.4 mm	Surface Mount	-55 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1
Texas Instruments CD4021BMG4	18 V	3 V	8	16-SOIC	16-SOIC	0.154 in	3.9 mm	Surface Mount	-55 °C	125 °C	Parallel or Serial to Serial	Shift Register	Push-Pull	1

Catalog

Automotive Catalog CMOS 8-Stage Static Shift Register

Key Features

• Qualified for Automotive ApplicationsMedium-Speed Operation: 12-MHz (Typ) Clock Rate at VDD– VSS= 10 VFully Static OperationEight Master-Slave Flip-Flops Plus Output Buffering and Control Gating100% Tested for Quiescent Current at 20 VMaximum Input Current of 1 µA at 18 V Over Full Package-Temperature Range:100 nA at 18 V and 25°CNoise Margin (Full Package-Temperature Range):1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 VStandardized Symmetrical Output Characteristics5-V, 10-V, and 15-V Parametric RatingsMeets All Requirements of JEDEC Tentative Standard No. 13B,"Standard Specifications for Description of ’B’ Series CMOS Devices"Latch-Up Performance Meets 50 mA per JESD 78, Class IAPPLICATIONSParallel Input/Serial Output Data QueuingParallel-to-Serial Data ConversionGeneral-Purpose RegisterQualified for Automotive ApplicationsMedium-Speed Operation: 12-MHz (Typ) Clock Rate at VDD– VSS= 10 VFully Static OperationEight Master-Slave Flip-Flops Plus Output Buffering and Control Gating100% Tested for Quiescent Current at 20 VMaximum Input Current of 1 µA at 18 V Over Full Package-Temperature Range:100 nA at 18 V and 25°CNoise Margin (Full Package-Temperature Range):1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 VStandardized Symmetrical Output Characteristics5-V, 10-V, and 15-V Parametric RatingsMeets All Requirements of JEDEC Tentative Standard No. 13B,"Standard Specifications for Description of ’B’ Series CMOS Devices"Latch-Up Performance Meets 50 mA per JESD 78, Class IAPPLICATIONSParallel Input/Serial Output Data QueuingParallel-to-Serial Data ConversionGeneral-Purpose Register

Description

CD4014B and CD4021B series types are 8-stage parallel- or serial-input/serial output registers having common CLOCK and PARALLEL/SERIAL CONTROL inputs, a single SERIAL data input, and individual parallel "JAM" inputs to each register stage. Each register stage is D-type, master-slave flip-flop. In addition to an output form stage 8, "Q" outputs are also available from stages 6 and 7. Parallel as well as serial entry is made into the register synchronously with the positive clock line transition in the CD4014B. In the CD4021B serial entry is synchronous with the clock by parallel entry is asynchronous. In both types, entry is controlled by the PARALLEL/SERIAL CONTROL input. When the PARALLEL/SERIAL CONTROL input is low, data is serially shifted into the 8-stage register synchronously with the positive transition of the clock line. When the PARALLEL/SERIAL CONTROL input is high, data is jammed into the 8-stage register via the parallel input lines and synchronous with the positive transition of the clock line. In the CD4021B, the CLOCK input of the internal stage is "forced" when asynchronous parallel entry is made. Register expansion using multiple packages is permitted. The CD4014B and CD4021B series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-oultine packages (PW and PWR suffixes). CD4014B and CD4021B series types are 8-stage parallel- or serial-input/serial output registers having common CLOCK and PARALLEL/SERIAL CONTROL inputs, a single SERIAL data input, and individual parallel "JAM" inputs to each register stage. Each register stage is D-type, master-slave flip-flop. In addition to an output form stage 8, "Q" outputs are also available from stages 6 and 7. Parallel as well as serial entry is made into the register synchronously with the positive clock line transition in the CD4014B. In the CD4021B serial entry is synchronous with the clock by parallel entry is asynchronous. In both types, entry is controlled by the PARALLEL/SERIAL CONTROL input. When the PARALLEL/SERIAL CONTROL input is low, data is serially shifted into the 8-stage register synchronously with the positive transition of the clock line. When the PARALLEL/SERIAL CONTROL input is high, data is jammed into the 8-stage register via the parallel input lines and synchronous with the positive transition of the clock line. In the CD4021B, the CLOCK input of the internal stage is "forced" when asynchronous parallel entry is made. Register expansion using multiple packages is permitted. The CD4014B and CD4021B series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-oultine packages (PW and PWR suffixes).