SN74LVC2G08-Q1 Series

Enhanced product, 2-ch, 2-input 1.65-V to 5.5-V 32-mA drive strength AND gate

Catalog

Enhanced product, 2-ch, 2-input 1.65-V to 5.5-V 32-mA drive strength AND gate

Part	Current - Output High, Low [y]	Current - Output High, Low [x]	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Current - Quiescent (Max) [Max]	Max Propagation Delay @ V, Max CL	Voltage - Supply [Max]	Voltage - Supply [Min]	Number of Inputs	Supplier Device Package	Mounting Type	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Logic Type	Operating Temperature [Max]	Operating Temperature [Min]	Number of Circuits	Current - Output High, Low	Package / Case [y]	Package / Case	Package / Case [y]	Grade	Qualification
Texas Instruments SN74LVC2G08YZTR	32 mA	32 mA	1.7 V	2 V	10 µA	3.8 ns	5.5 V	1.65 V	2	8-DSBGA	Surface Mount	0.8 V	0.7 V	AND Gate	85 °C	-40 °C	2
Texas Instruments SN74LVC2G08DCTR	32 mA	32 mA	1.7 V	2 V	10 µA	3.8 ns	5.5 V	1.65 V	2	SM8	Surface Mount	0.8 V	0.7 V	AND Gate	125 °C	-40 °C	2
Texas Instruments SN74LVC2G08MDCUREP			1.7 V	2 V	10 µA	4.8 ns	5.5 V	1.65 V	2		Surface Mount	0.8 V	0.7 V	AND Gate	125 °C	-55 °C	2	24 mA	2.3 mm	8-VFSOP	0.091 in
Texas Instruments SN74LVC2G08DCUR	32 mA	32 mA	1.7 V	2 V	10 µA	3.8 ns	5.5 V	1.65 V	2		Surface Mount	0.8 V	0.7 V	AND Gate	125 °C	-40 °C	2		2.3 mm	8-VFSOP	0.091 in
Texas Instruments SN74LVC2G08DCURG4	32 mA	32 mA	1.7 V	2 V	10 µA	3.8 ns	5.5 V	1.65 V	2		Surface Mount	0.8 V	0.7 V	AND Gate	125 °C	-40 °C	2		2.3 mm	8-VFSOP	0.091 in
Texas Instruments SN74LVC2G08DCURE4	32 mA	32 mA	1.7 V	2 V	10 µA	3.8 ns	5.5 V	1.65 V	2		Surface Mount	0.8 V	0.7 V	AND Gate	125 °C	-40 °C	2		2.3 mm	8-VFSOP	0.091 in
Texas Instruments SN74LVC2G08IDCTRQ1	32 mA	32 mA	1.7 V	2 V	10 µA	3.8 ns	5.5 V	1.65 V	2	SM8	Surface Mount	0.8 V	0.7 V	AND Gate	85 °C	-40 °C	2					Automotive	AEC-Q100
Texas Instruments SN74LVC2G08DCTRG4	32 mA	32 mA	1.7 V	2 V	10 µA	3.8 ns	5.5 V	1.65 V	2	SM8	Surface Mount	0.8 V	0.7 V	AND Gate	125 °C	-40 °C	2
Texas Instruments SN74LVC2G08DCU6
Texas Instruments SN74LVC2G08DCUTG4	32 mA	32 mA	1.7 V	2 V	10 µA	3.8 ns	5.5 V	1.65 V	2		Surface Mount	0.8 V	0.7 V	AND Gate	125 °C	-40 °C	2		2.3 mm	8-VFSOP	0.091 in

Catalog

Enhanced product, 2-ch, 2-input 1.65-V to 5.5-V 32-mA drive strength AND gate

Key Features

• Controlled BaselineOne AssemblyOne Test SiteOne Fabrication SiteEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification Pedigree(1)Supports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 5.7 ns at 3.3 VLow Power Consumption, 10 µA Max ICC±24 mA Output Drive at 3.3 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2 V at VCC= 3.3 V, TA= 25°CIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)1000-V Charged-Device Model (C101)(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.Controlled BaselineOne AssemblyOne Test SiteOne Fabrication SiteEnhanced Diminishing Manufacturing Sources (DMS) SupportEnhanced Product-Change NotificationQualification Pedigree(1)Supports 5-V VCCOperationInputs Accept Voltages to 5.5 VMax tpdof 5.7 ns at 3.3 VLow Power Consumption, 10 µA Max ICC±24 mA Output Drive at 3.3 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2 V at VCC= 3.3 V, TA= 25°CIoffSupports Partial-Power-Down Mode OperationLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)1000-V Charged-Device Model (C101)(1)Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

Description

This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC2G08 device performs the Boolean function A × B or Y =A\ + B\in positive logic. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This dual 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC2G08 device performs the Boolean function A × B or Y =A\ + B\in positive logic. NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.