SMJ320C25 Series
Military grade C25 floating-point DSP - ceramic package
Manufacturer: Texas Instruments
Catalog
Military grade C25 floating-point DSP - ceramic package
Key Features
• Military Temperature Range-55°C to 125°C100-ns or 80-ns Instruction Cycle Times544 Words of Programmable On-Chip Data RAM4K Words of On-Chip Program ROM128K Words of Data/Program Space16 Input and 16 Output Channels16-Bit Parallel InterfaceDirectly Accessible External Data Memory SpaceGlobal Data Memory Interface16-Bit Instruction and Data Words16 × 16-Bit Multiplier With a 32-Bit Product32-Bit ALU and AccumulatorSingle-Cycle Multiply/Accumulate Instructions0 to 16-Bit Scaling ShifterBit Manipulation and Logical InstructionsInstruction Set Support for Floating-Point Operations, Adaptive Filtering, and Extended-Precision ArithmeticBlock Moves for Data/Program ManagementRepeat Instructions for Efficient Use of Program SpaceEight Auxiliary Registers and Dedicated Arithmetic Unit for Indirect AddressingSerial Port for Direct Code InterfaceSynchronization Input for Synchronous Multiprocessor ConfigurationsWait States for Communication to Slow-Off-Chip Memories/PeripheralsOn-Chip Timer for Control OperationsThree External Maskable User InterruptsInput Pin Polled by Software Branch Instruction1.6-um CMOS TechnologyProgrammable Output Pin for Signaling External DevicesSingle 5-V SupplyOn-Chip Clock GeneratorPackaging:68-Pin Leaded Ceramic Chip Carrier (FJ Suffix)68-Pin Ceramic Grid Array (GB Suffix)68-Pin Leadless Ceramic Chip Carrier (FD Suffix)SMJ320 is a trademark of Texas Instruments Incorporated.Military Temperature Range-55°C to 125°C100-ns or 80-ns Instruction Cycle Times544 Words of Programmable On-Chip Data RAM4K Words of On-Chip Program ROM128K Words of Data/Program Space16 Input and 16 Output Channels16-Bit Parallel InterfaceDirectly Accessible External Data Memory SpaceGlobal Data Memory Interface16-Bit Instruction and Data Words16 × 16-Bit Multiplier With a 32-Bit Product32-Bit ALU and AccumulatorSingle-Cycle Multiply/Accumulate Instructions0 to 16-Bit Scaling ShifterBit Manipulation and Logical InstructionsInstruction Set Support for Floating-Point Operations, Adaptive Filtering, and Extended-Precision ArithmeticBlock Moves for Data/Program ManagementRepeat Instructions for Efficient Use of Program SpaceEight Auxiliary Registers and Dedicated Arithmetic Unit for Indirect AddressingSerial Port for Direct Code InterfaceSynchronization Input for Synchronous Multiprocessor ConfigurationsWait States for Communication to Slow-Off-Chip Memories/PeripheralsOn-Chip Timer for Control OperationsThree External Maskable User InterruptsInput Pin Polled by Software Branch Instruction1.6-um CMOS TechnologyProgrammable Output Pin for Signaling External DevicesSingle 5-V SupplyOn-Chip Clock GeneratorPackaging:68-Pin Leaded Ceramic Chip Carrier (FJ Suffix)68-Pin Ceramic Grid Array (GB Suffix)68-Pin Leadless Ceramic Chip Carrier (FD Suffix)SMJ320 is a trademark of Texas Instruments Incorporated.
Description
AI
This data sheet provides design documentation for the SMJ320C25 and the SMJ320C25-50 digital signal processor (DSP) devices in the SMJ320™ family of VLSI digital signal processors and peripherals. The SMJ320 family supports a wide range of digital signal processing applications such as tactical communications, guidance, military modems, speech processing, spectrum analysis, audio processing, digital filtering, high-speed control, graphics, and other computation-intensive applications.
Differences between the SMJ320C25 and the SMJ320C25-50 are specifically identified, as in the following paragraph and in the parameter tables on pages 18 through 24 of this data sheet. When not specifically differentiated, the term SMJ320C25 is used to describe both devices.
The SMJ320C25 has a 100-ns instruction cycle time. The SMJ320C25-50 has an 80-ns instruction cycle time. With these fast instruction cycle times and their innovative memory configurations, these devices perform operations necessary for many real-time digital signal processing algorithms. Since most instructions require only one cycle, the SMJ320C25 is capable of executing 12.5 million instructions per second. On-chip data RAM of 544 16-bit words, on-chip program ROM of 4K words, direct addressing of up to 64K words of external data memory space and 64K words of external program memory space, and multiprocessor interface features for sharing global memory minimize unnecessary data transfers to take full advantage of the capabilities of the instruction set.
This data sheet provides design documentation for the SMJ320C25 and the SMJ320C25-50 digital signal processor (DSP) devices in the SMJ320™ family of VLSI digital signal processors and peripherals. The SMJ320 family supports a wide range of digital signal processing applications such as tactical communications, guidance, military modems, speech processing, spectrum analysis, audio processing, digital filtering, high-speed control, graphics, and other computation-intensive applications.
Differences between the SMJ320C25 and the SMJ320C25-50 are specifically identified, as in the following paragraph and in the parameter tables on pages 18 through 24 of this data sheet. When not specifically differentiated, the term SMJ320C25 is used to describe both devices.
The SMJ320C25 has a 100-ns instruction cycle time. The SMJ320C25-50 has an 80-ns instruction cycle time. With these fast instruction cycle times and their innovative memory configurations, these devices perform operations necessary for many real-time digital signal processing algorithms. Since most instructions require only one cycle, the SMJ320C25 is capable of executing 12.5 million instructions per second. On-chip data RAM of 544 16-bit words, on-chip program ROM of 4K words, direct addressing of up to 64K words of external data memory space and 64K words of external program memory space, and multiprocessor interface features for sharing global memory minimize unnecessary data transfers to take full advantage of the capabilities of the instruction set.
