CD4068B Series

CMOS 8-Input NAND/AND Gate

Catalog

CMOS 8-Input NAND/AND Gate

Part	Number of Inputs	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Output Type	Number of Circuits	Supplier Device Package	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case [x]	Package / Case	Package / Case [y]	Logic Type	Operating Temperature [Min]	Operating Temperature [Max]	Package / Case [custom]	Package / Case [custom]
Texas Instruments CD4068BNSR	8	Surface Mount	18 V	3 V	Single-Ended	1	14-SO	6.8 mA	6.8 mA	0.209 "	14-SOIC	5.3 mm	AND Gate NAND Gate	-55 °C	125 °C
Texas Instruments CD4068BPW	8	Surface Mount	18 V	3 V	Single-Ended	1	14-TSSOP	6.8 mA	6.8 mA		14-TSSOP		AND Gate NAND Gate	-55 °C	125 °C	0.173 "	4.4 mm
Texas Instruments CD4068BM	8	Surface Mount	18 V	3 V	Single-Ended	1		6.8 mA	6.8 mA	0.154 in	14-SOIC	3.9 mm	AND Gate NAND Gate	-55 °C	125 °C

Catalog

CMOS 8-Input NAND/AND Gate

Key Features

• Medium Speed Operation:tPHL, tPLH=75 ns (typ.) at VDD= 10 VBuffered inputs and outputs5-V, 10-V, and 15-V parametric ratingsStandardized symmetrical output characteristics100% tested for quiescent current at 20 VMaximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°CNoise margin (over full package-temperature range) =1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Data sheet acquired from Harris SemiconductorMedium Speed Operation:tPHL, tPLH=75 ns (typ.) at VDD= 10 VBuffered inputs and outputs5-V, 10-V, and 15-V parametric ratingsStandardized symmetrical output characteristics100% tested for quiescent current at 20 VMaximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°CNoise margin (over full package-temperature range) =1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Data sheet acquired from Harris Semiconductor

Description

CD4068B NAND/AND gate provides the system designer with direct implementation of the positive-logic 8-input NAND and AND functions and supplements the existing family of CMOS gates. The CD4068B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes). CD4068B NAND/AND gate provides the system designer with direct implementation of the positive-logic 8-input NAND and AND functions and supplements the existing family of CMOS gates. The CD4068B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).