
SN74ABT16646 Series
16-Bit Bus Transceivers And Registers With 3-State Outputs
Manufacturer: Texas Instruments
Catalog
16-Bit Bus Transceivers And Registers With 3-State Outputs
Key Features
• Members of the Texas InstrumentsWidebusTMFamilyState-of-the-ArtEPIC-IIBTMBiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JESD 17Typical VOLP(Output Ground Bounce) < 1 V at VCC= 5 V, TA= 25°CDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutHigh-Drive Outputs (-32-mA IOH, 64-mA IOL)Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsWidebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.Members of the Texas InstrumentsWidebusTMFamilyState-of-the-ArtEPIC-IIBTMBiCMOS Design Significantly Reduces Power DissipationLatch-Up Performance Exceeds 500 mA Per JESD 17Typical VOLP(Output Ground Bounce) < 1 V at VCC= 5 V, TA= 25°CDistributed VCCand GND Pin Configuration Minimizes High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutHigh-Drive Outputs (-32-mA IOH, 64-mA IOL)Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsWidebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.
Description
AI
The 'ABT16646 devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'ABT16646 devices.
Output-enable (OE\) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. The direction control (DIR) determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.
When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16646 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16646 is characterized for operation from -40°C to 85°C.
The 'ABT16646 devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'ABT16646 devices.
Output-enable (OE\) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. The direction control (DIR) determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.
When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT16646 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT16646 is characterized for operation from -40°C to 85°C.