ADC3643 Series
Dual-channel, 14-bit, 65-MSPS, low-noise, ultra-low-power analog-to-digital converter (ADC)
Manufacturer: Texas Instruments
Catalog
Dual-channel, 14-bit, 65-MSPS, low-noise, ultra-low-power analog-to-digital converter (ADC)
Key Features
• Dual channel14-bit 10/25/65 MSPS ADCNoise floor: –155 dBFS/HzUltra-low power with optimized power scaling: 29 mW/ch (10 MSPS) to 72 mW/ch (65 MSPS)Latency: 1 clock cycle14-Bit, no missing codesINL: ±0.6 LSB; DNL: ±0.2 LSBReference: external or internalIndustrial temperature range: –40°C to +105°COn-chip digital filter (optional)Decimation by 2, 4, 8, 16, 3232-bit NCODDR and Serial CMOS interfaceSmall footprint: 40-VQFN (5 mm × 5 mm) packageSingle 1.8-V supplySpectral performance (fIN= 5 MHz):SNR: 79.0 dBFSSFDR: 93-dBc HD2, HD3SFDR: 101-dBFS worst spurSpectral performance (fIN= 64 MHz):SNR: 74.0 dBFSSFDR: 84-dBc HD2, HD3SFDR: 90-dBFS worst spurDual channel14-bit 10/25/65 MSPS ADCNoise floor: –155 dBFS/HzUltra-low power with optimized power scaling: 29 mW/ch (10 MSPS) to 72 mW/ch (65 MSPS)Latency: 1 clock cycle14-Bit, no missing codesINL: ±0.6 LSB; DNL: ±0.2 LSBReference: external or internalIndustrial temperature range: –40°C to +105°COn-chip digital filter (optional)Decimation by 2, 4, 8, 16, 3232-bit NCODDR and Serial CMOS interfaceSmall footprint: 40-VQFN (5 mm × 5 mm) packageSingle 1.8-V supplySpectral performance (fIN= 5 MHz):SNR: 79.0 dBFSSFDR: 93-dBc HD2, HD3SFDR: 101-dBFS worst spurSpectral performance (fIN= 64 MHz):SNR: 74.0 dBFSSFDR: 84-dBc HD2, HD3SFDR: 90-dBFS worst spur
Description
AI
The ADC364x family of devices are low-noise, ultra-low power, 14-bit, 10-MSPS to 65-MSPS dual-channel, high-speed analog-to-digital converters (ADCs). Designed for low power consumption, these devices deliver a noise spectral density of –155 dBFS/Hz, combined with excellent linearity and dynamic range. The ADC364x offers very good dc precision, together with IF sampling support, which make the device an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 72 mW/ch at 65 MSPS, and power consumption scales well with lower sampling rates.
The ADC364x use a DDR or serial CMOS interface to output the data offering lowest power digital interface, together with flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40 to +105⁰C.
The ADC364x family of devices are low-noise, ultra-low power, 14-bit, 10-MSPS to 65-MSPS dual-channel, high-speed analog-to-digital converters (ADCs). Designed for low power consumption, these devices deliver a noise spectral density of –155 dBFS/Hz, combined with excellent linearity and dynamic range. The ADC364x offers very good dc precision, together with IF sampling support, which make the device an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 72 mW/ch at 65 MSPS, and power consumption scales well with lower sampling rates.
The ADC364x use a DDR or serial CMOS interface to output the data offering lowest power digital interface, together with flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40 to +105⁰C.
