ISO5852S-EP Series
5.7kVrms, 2.5A/5A enhanced 1-channel isolated gate driver w/split output, active protection features
Manufacturer: Texas Instruments
Catalog
5.7kVrms, 2.5A/5A enhanced 1-channel isolated gate driver w/split output, active protection features
| Part | Approval Agency | Voltage - Isolation | Technology | Package / Case [x] | Package / Case | Package / Case [y] | Mounting Type | Common Mode Transient Immunity (Min) [Min] | Current - Output High, Low | Supplier Device Package | Number of Channels | Current - Peak Output | Rise / Fall Time (Typ) [custom] | Rise / Fall Time (Typ) [custom] | Operating Temperature [Min] | Operating Temperature [Max] | Voltage - Output Supply [Min] | Voltage - Output Supply [Max] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
 Texas Instruments | CQC CSA TUV UL VDE | 5700 Vrms | Capacitive Coupling | 0.295 in | 16-SOIC | 7.5 mm | Surface Mount | 100 V/ns | 1.5 A 3.4 A | 16-SOIC | 1 | 2.7 A 5.5 A | 20 ns | 18 ns | -55 °C | 125 °C | 15 V | 30 V |
Key Features
• 100-kV/μs Minimum Common-Mode Transient Immunity (CMTI) at VCM= 1500 VSplit Outputs to Provide 2.5-A Peak Source and 5-A Peak Sink CurrentsShort Propagation Delay: 76 ns (Typ), 110 ns (Max)2-A Active Miller ClampOutput Short-Circuit ClampSoft Turn-Off (STO) during Short CircuitFault Alarm upon Desaturation Detection is Signaled onFLTand Reset ThroughRSTInput and Output Undervoltage Lockout (UVLO) with Ready (RDY) Pin IndicationActive Output Pulldown and Default Low Outputs with Low Supply or Floating Inputs2.25-V to 5.5-V Input Supply Voltage15-V to 30-V Output Driver Supply VoltageCMOS Compatible InputsRejects Input Pulses and Noise Transients Shorter Than 20 nsOperating Temperature: –55°C to +125°C AmbientSurge Immunity 12800-VPK(according to IEC 61000-4-5)Safety-Related Certifications:8000-VPKVIOTMand 2121-VPKVIORMReinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-125700-VRMSIsolation for 1 Minute per UL 1577CSA Component Acceptance Notice 5A, IEC 60950-1, IEC 60601-1 and IEC 61010-1 End Equipment StandardsCQC Certification per GB4943.1-2011All Certifications Complete per UL, VDE, CQC, TUV and Planned for CSA100-kV/μs Minimum Common-Mode Transient Immunity (CMTI) at VCM= 1500 VSplit Outputs to Provide 2.5-A Peak Source and 5-A Peak Sink CurrentsShort Propagation Delay: 76 ns (Typ), 110 ns (Max)2-A Active Miller ClampOutput Short-Circuit ClampSoft Turn-Off (STO) during Short CircuitFault Alarm upon Desaturation Detection is Signaled onFLTand Reset ThroughRSTInput and Output Undervoltage Lockout (UVLO) with Ready (RDY) Pin IndicationActive Output Pulldown and Default Low Outputs with Low Supply or Floating Inputs2.25-V to 5.5-V Input Supply Voltage15-V to 30-V Output Driver Supply VoltageCMOS Compatible InputsRejects Input Pulses and Noise Transients Shorter Than 20 nsOperating Temperature: –55°C to +125°C AmbientSurge Immunity 12800-VPK(according to IEC 61000-4-5)Safety-Related Certifications:8000-VPKVIOTMand 2121-VPKVIORMReinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-125700-VRMSIsolation for 1 Minute per UL 1577CSA Component Acceptance Notice 5A, IEC 60950-1, IEC 60601-1 and IEC 61010-1 End Equipment StandardsCQC Certification per GB4943.1-2011All Certifications Complete per UL, VDE, CQC, TUV and Planned for CSA
Description
AI
The ISO5852S-EP device is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15-V to maximum 30-V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.
An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 µs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, VEE2, the gate-driver output is pulled hard to the VEE2potential which turns the IGBT immediately off.
When desaturation is active, a fault signal is sent across the isolation barrier pulling theFLToutput at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. TheFLToutput condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at theRSTinput.
When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.
The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.
The ISO5852S-EP device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –55°C to +125°C ambient.
The ISO5852S-EP device is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15-V to maximum 30-V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.
An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 µs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, VEE2, the gate-driver output is pulled hard to the VEE2potential which turns the IGBT immediately off.
When desaturation is active, a fault signal is sent across the isolation barrier pulling theFLToutput at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. TheFLToutput condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at theRSTinput.
When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.
The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.
The ISO5852S-EP device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –55°C to +125°C ambient.