TPS7H4001-SP Series

Radiation-hardened, QMLV and QMLP, 3-V to 7-V input 18-A synchronous step-down converter

Catalog

Radiation-hardened, QMLV and QMLP, 3-V to 7-V input 18-A synchronous step-down converter

Part	Package / Case	Current - Output	Synchronous Rectifier	Output Configuration	Voltage - Input (Max) [Max]	Supplier Device Package	Frequency - Switching [Max]	Frequency - Switching [Min]	Voltage - Output (Max) [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Voltage - Output (Min/Fixed) [Min]	Mounting Type	Voltage - Input (Min) [Min]	Output Type	Function	Number of Outputs	Topology
Texas Instruments TPS7H4001Y/EM	Die	18 A		Positive	7 V	Die	1 MHz	100 kHz	7 V	125 ¯C	-55 °C	0.604 V	Surface Mount	3 V	Adjustable	Step-Down	1	Buck

Catalog

Radiation-hardened, QMLV and QMLP, 3-V to 7-V input 18-A synchronous step-down converter

Key Features

• Radiation performance:Radiation-hardness-assured up to TID 100 krad(Si)SEL, SEB, and SEGR immune to LET = 75 MeV-cm 2/mgSET and SEFI characterized up to LET = 75 MeV-cm 2/mgPeak efficiency: 95.5% (V O = 1 V at 100 kHz)Power rail: 3 V to 7 V on VINFlexible switching frequency options:100-kHz to 1-MHz adjustable internal oscillatorExternal sync capability: 100-kHz to 1-MHzSYNC pins can be configured as 500-kHz clocks at 90° out of phase to parallel up to 4 devices0.6-V ±1.5% voltage reference over temperature, radiation, and line and load regulation for CDFP, KGD (known good die), and HTSSOP (QMLP) options0.6-V ±1.7% voltage reference over temperature, radiation, and line and load regulation for HTSSOP (SHP) optionMonotonic start-up into prebiased outputsAdjustable slope compensation and soft-startAdjustable input enable and power-good output for power sequencingRadiation performance:Radiation-hardness-assured up to TID 100 krad(Si)SEL, SEB, and SEGR immune to LET = 75 MeV-cm 2/mgSET and SEFI characterized up to LET = 75 MeV-cm 2/mgPeak efficiency: 95.5% (V O = 1 V at 100 kHz)Power rail: 3 V to 7 V on VINFlexible switching frequency options:100-kHz to 1-MHz adjustable internal oscillatorExternal sync capability: 100-kHz to 1-MHzSYNC pins can be configured as 500-kHz clocks at 90° out of phase to parallel up to 4 devices0.6-V ±1.5% voltage reference over temperature, radiation, and line and load regulation for CDFP, KGD (known good die), and HTSSOP (QMLP) options0.6-V ±1.7% voltage reference over temperature, radiation, and line and load regulation for HTSSOP (SHP) optionMonotonic start-up into prebiased outputsAdjustable slope compensation and soft-startAdjustable input enable and power-good output for power sequencing

Description

The TPS7H4001-SP is a radiation-hardness-assured, 7-V, 18-A synchronous buck converter with integrated low-resistance high-side and low-side MOSFETs. High efficiency and reduced component count are achieved through current mode control. The output voltage start-up ramp is controlled by the SS/TR pin which allows operation as either a stand alone power supply or in tracking situations. Power sequencing is possible by correctly configuring the enable and the power good pins. The TPS7H4001-SP can be configured in primary-secondary mode and with the SYNC2 pin, four devices can be configured in parallel without an external clock. Cycle-by-cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current protection which prevents current runaway. Thermal shutdown disables the part when die temperature exceeds thermal limit. The TPS7H4001-SP is a radiation-hardness-assured, 7-V, 18-A synchronous buck converter with integrated low-resistance high-side and low-side MOSFETs. High efficiency and reduced component count are achieved through current mode control. The output voltage start-up ramp is controlled by the SS/TR pin which allows operation as either a stand alone power supply or in tracking situations. Power sequencing is possible by correctly configuring the enable and the power good pins. The TPS7H4001-SP can be configured in primary-secondary mode and with the SYNC2 pin, four devices can be configured in parallel without an external clock. Cycle-by-cycle current limiting on the high-side FET protects the device in overload situations and is enhanced by a low-side sourcing current protection which prevents current runaway. Thermal shutdown disables the part when die temperature exceeds thermal limit.