74ABT74 Series

Dual D-type flip-flop with set and reset; positive edge-trigger

Catalog

Dual D-type flip-flop with set and reset; positive edge-trigger

Part	Package / Case [x]	Package / Case	Number of Elements	Trigger Type	Supplier Device Package	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Number of Bits per Element	Type	Operating Temperature [Max]	Operating Temperature [Min]	Function	Input Capacitance	Max Propagation Delay @ V, Max CL	Clock Frequency	Output Type	Current - Quiescent (Iq)	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]
Nexperia USA Inc. 74ABT74PW,118	0.173 " 4.4 mm	14-TSSOP	2	Positive Edge	14-TSSOP	20 mA	15 mA	1	D-Type	85 C	-40 ¯C	Set(Preset) and Reset	3 pF	4.2 ns	250 MHz	Complementary	50 çA	Surface Mount	5.5 V	4.5 V
Nexperia USA Inc. 74ABT74PW,112	0.173 " 4.4 mm	14-TSSOP	2	Positive Edge	14-TSSOP	20 mA	15 mA	1	D-Type	85 C	-40 ¯C	Set(Preset) and Reset	3 pF	4.2 ns	250 MHz	Complementary	50 çA	Surface Mount	5.5 V	4.5 V

Catalog

Dual D-type flip-flop with set and reset; positive edge-trigger

Description

The 74ABT74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q andQoutputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.