CY74FCT2543T Series

Octal Registered Transceivers with 3-State Outputs and Series Damping Resistors

Catalog

Octal Registered Transceivers with 3-State Outputs and Series Damping Resistors

Part	Number of Elements	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Package / Case	Package / Case [custom]	Supplier Device Package	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case [custom]
Texas Instruments CY74FCT2543TQCT	1	8	4.75 V	5.25 V	Surface Mount	85 °C	-40 °C	3-State	24-SSOP	0.154 " 3.9 mm	24-SSOP	15 mA	12 mA
Texas Instruments CY74FCT2543CTSOC	1	8	4.75 V	5.25 V	Surface Mount	85 °C	-40 °C	3-State	24-SOIC	7.5 mm	24-SOIC	15 mA	12 mA	0.295 in
Texas Instruments CY74FCT2543TQC
Texas Instruments CY74FCT2543TQCTG4	1	8	4.75 V	5.25 V	Surface Mount	85 °C	-40 °C	3-State	24-SSOP	0.154 " 3.9 mm	24-SSOP	15 mA	12 mA
Texas Instruments CY74FCT2543TQCTE4	1	8	4.75 V	5.25 V	Surface Mount	85 °C	-40 °C	3-State	24-SSOP	0.154 " 3.9 mm	24-SSOP	15 mA	12 mA
Texas Instruments CY74FCT2543ATQCT	1	8	4.75 V	5.25 V	Surface Mount	85 °C	-40 °C	3-State	24-SSOP	0.154 " 3.9 mm	24-SSOP	15 mA	12 mA
Texas Instruments 74FCT2543CTSOCTE4	1	8	4.75 V	5.25 V	Surface Mount	85 °C	-40 °C	3-State	24-SOIC	7.5 mm	24-SOIC	15 mA	12 mA	0.295 in
Texas Instruments CY74FCT2543CTSOCT	1	8	4.75 V	5.25 V	Surface Mount	85 °C	-40 °C	3-State	24-SOIC	7.5 mm	24-SOIC	15 mA	12 mA	0.295 in
Texas Instruments CY74FCT2543CTQCT	1	8	4.75 V	5.25 V	Surface Mount	85 °C	-40 °C	3-State	24-SSOP	0.154 " 3.9 mm	24-SSOP	15 mA	12 mA

Catalog

Octal Registered Transceivers with 3-State Outputs and Series Damping Resistors

Key Features

• Function and Pinout Compatible With FCT and F Logic25-Output Series Resistors to Reduce Transmission-Line Reflection NoiseReduced VOH(Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationMatched Rise and Fall TimesFully Compatible With TTL Input and Output Logic Levels12-mA Output Sink Current15-mA Output Source CurrentSeparation Controls for Data Flow in Each DirectionBack-to-Back Latches for StorageESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)3-State OutputsFunction and Pinout Compatible With FCT and F Logic25-Output Series Resistors to Reduce Transmission-Line Reflection NoiseReduced VOH(Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationMatched Rise and Fall TimesFully Compatible With TTL Input and Output Logic Levels12-mA Output Sink Current15-mA Output Source CurrentSeparation Controls for Data Flow in Each DirectionBack-to-Back Latches for StorageESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)3-State Outputs

Description

The CY74FCT2543T octal latched transceiver contains two sets of eight D-type latches. Separate latch enable (LEAB\, LEBA\) and output enable (OEAB\, OEBA\) inputs permit each latch set to have independent control of inputting and outputting in either direction of data flow. For example, for data flow from A to B, the A-to-B enable (CEAB\) input must be low to enter data from A or to take data from B, as indicated in the function table. With CEAB\ low, a low signal on the A-to-B latch enable (LEAB\) input makes the A-to-B latches transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB\ and OEAB\ both low, the 3-state B output buffers are active and reflect data present at the output of the A latches. Control of data from B to A is similar, but uses CEAB\, LEAB\, and OEAB\ inputs. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2543T can replace the CY74FCT543T to reduce noise in an existing design. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT2543T octal latched transceiver contains two sets of eight D-type latches. Separate latch enable (LEAB\, LEBA\) and output enable (OEAB\, OEBA\) inputs permit each latch set to have independent control of inputting and outputting in either direction of data flow. For example, for data flow from A to B, the A-to-B enable (CEAB\) input must be low to enter data from A or to take data from B, as indicated in the function table. With CEAB\ low, a low signal on the A-to-B latch enable (LEAB\) input makes the A-to-B latches transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB\ and OEAB\ both low, the 3-state B output buffers are active and reflect data present at the output of the A latches. Control of data from B to A is similar, but uses CEAB\, LEAB\, and OEAB\ inputs. On-chip termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2543T can replace the CY74FCT543T to reduce noise in an existing design. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.