TPS65921 Series
Integrated Power Management IC (PMIC) with 3 DC/DC's, 4 LDOs, USB HS Transceiver
Manufacturer: Texas Instruments
Catalog
Integrated Power Management IC (PMIC) with 3 DC/DC's, 4 LDOs, USB HS Transceiver
Key Features
• Three Step-Down Converters:Up to 1.2 A of Output Current for VDD1TPS65921B Supports VDD1 up to 1.2 ATPS65921B1 Supports VDD1 up to 1.4 A (Necessary for 1-GHz Operation)SmartReflex Dynamic Voltage Management3.2-MHz Fixed Frequency OperationVINRange from 2.7 to 4.5 VTypical 30 µA Quiescent per ConverterFour General-Purpose Configurable LDOs:Dynamic Voltage Scaling220-mA Maximum Current for One LDOVINRange from 2.7 to 4.5 V2 LDOs With Low Noise and High PSRRRTC With Alarm Wake-Up MechanismClock Management32-kHz Crystal OscillatorClock Slicer for 26, 19.2, and 38.4 MHzHF Clock Output BufferUSB:USB HS 2.0 TransceiverUSB 1.3 OTG-Compliant12-Bit ULPI 1.1 InterfaceUSB Power Supply (5-V CP for VBUS)ControlHigh-Speed I2C InterfaceAll Resource Configurable by I2CKeypad Interface up to 8 × 810-Bit A/D ConverterHot-Die, Thermal Shutdown Protectionµ*BGA 120 Balls ZQZThree Step-Down Converters:Up to 1.2 A of Output Current for VDD1TPS65921B Supports VDD1 up to 1.2 ATPS65921B1 Supports VDD1 up to 1.4 A (Necessary for 1-GHz Operation)SmartReflex Dynamic Voltage Management3.2-MHz Fixed Frequency OperationVINRange from 2.7 to 4.5 VTypical 30 µA Quiescent per ConverterFour General-Purpose Configurable LDOs:Dynamic Voltage Scaling220-mA Maximum Current for One LDOVINRange from 2.7 to 4.5 V2 LDOs With Low Noise and High PSRRRTC With Alarm Wake-Up MechanismClock Management32-kHz Crystal OscillatorClock Slicer for 26, 19.2, and 38.4 MHzHF Clock Output BufferUSB:USB HS 2.0 TransceiverUSB 1.3 OTG-Compliant12-Bit ULPI 1.1 InterfaceUSB Power Supply (5-V CP for VBUS)ControlHigh-Speed I2C InterfaceAll Resource Configurable by I2CKeypad Interface up to 8 × 810-Bit A/D ConverterHot-Die, Thermal Shutdown Protectionµ*BGA 120 Balls ZQZ
Description
AI
The TPS65921 device is a highly integrated power-management circuit (IC) that supports the power and peripheral requirements of the OMAP application processors. The device contains power management, a universal serial bus (USB) high-speed (HS) transceiver, an analog-to-digital converter (ADC), a real-time clock (RTC), a keypad interface, and an embedded power control (EPC). The power portion of the device contains three buck converters, two controllable by a dedicated SmartReflex class-3 interface, multiple low-dropout (LDO) regulators, an EPC to manage the power-sequencing requirements of OMAP, and an RTC module. The USB module provides an HS 2.0 transceiver suitable for direct connection to the OMAP universal transceiver macrocell interface (UTMI) + low pin interface (ULPI) with an integrated charge pump (CP).
The device also provides auxiliary modules: ADC, keypad interface, and general-purpose inputs/outputs (GPIOs) muxed with the JTAG functions. The keypad interface implements a built-in scanning algorithm to decode hardware-based key presses and to reduce software use, with multiple additional GPIOs that can be used as interrupts when they are configured as inputs.
The TPS65921 device is a highly integrated power-management circuit (IC) that supports the power and peripheral requirements of the OMAP application processors. The device contains power management, a universal serial bus (USB) high-speed (HS) transceiver, an analog-to-digital converter (ADC), a real-time clock (RTC), a keypad interface, and an embedded power control (EPC). The power portion of the device contains three buck converters, two controllable by a dedicated SmartReflex class-3 interface, multiple low-dropout (LDO) regulators, an EPC to manage the power-sequencing requirements of OMAP, and an RTC module. The USB module provides an HS 2.0 transceiver suitable for direct connection to the OMAP universal transceiver macrocell interface (UTMI) + low pin interface (ULPI) with an integrated charge pump (CP).
The device also provides auxiliary modules: ADC, keypad interface, and general-purpose inputs/outputs (GPIOs) muxed with the JTAG functions. The keypad interface implements a built-in scanning algorithm to decode hardware-based key presses and to reduce software use, with multiple additional GPIOs that can be used as interrupts when they are configured as inputs.
