DS90UR905Q-Q1 Series

5-MHz to 65-MHz 24-bit color FPD-Link II serializer

Catalog

5-MHz to 65-MHz 24-bit color FPD-Link II serializer

Part	Input Type	Qualification	Grade	Number of Outputs	Voltage - Supply [Max]	Voltage - Supply [Min]	Number of Inputs	Data Rate	Package / Case	Mounting Type	Function	Output Type	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]
Texas Instruments DS90UR905QSQE/NOPB	LVCMOS	AEC-Q100	Automotive	1	1.89 V 3.6 V	1.71 V 3 V	24	1.82 Gbps	48-WFQFN Exposed Pad	Surface Mount	Serializer	FPD-Link II LVDS	48-WQFN (7x7)	105 °C	-40 °C

Catalog

5-MHz to 65-MHz 24-bit color FPD-Link II serializer

Key Features

• 5- to 65-MHz PCLK support (140 Mbps to1.82 Gbps)AC-Coupled STP interconnect cable up to 10 metersIntegrated terminations on serializer and deserializerAt speed link BIST mode and reporting pinOptional I2C-compatible serial control busRGB888 + VS, HS, DE supportPower down mode minimizes power dissipation1.8-V or 3.3-V compatible LVCMOS I/O interfaceAutomotive-grade product: AEC-Q100 grade 2 qualified>8-kV HBM and ISO 10605 ESD ratingBackward compatible mode for operation with older generation devicesSERIALIZER — DS90UR905Q-Q1RGB888 + VS/HS/DE serialized to 1 Pair FPD-Link IIRandomizer/scrambler — DC-balanced data streamSelectable output VOD and adjustable de-emphasisDESERIALIZER — DS90UR906Q-Q1FAST random data lock; no reference clock requiredAdjustable input receiver equalizationLOCK (real time link status) reporting pinEMI minimization on output parallel bus (SSCG)Output slew control (OS)5- to 65-MHz PCLK support (140 Mbps to1.82 Gbps)AC-Coupled STP interconnect cable up to 10 metersIntegrated terminations on serializer and deserializerAt speed link BIST mode and reporting pinOptional I2C-compatible serial control busRGB888 + VS, HS, DE supportPower down mode minimizes power dissipation1.8-V or 3.3-V compatible LVCMOS I/O interfaceAutomotive-grade product: AEC-Q100 grade 2 qualified>8-kV HBM and ISO 10605 ESD ratingBackward compatible mode for operation with older generation devicesSERIALIZER — DS90UR905Q-Q1RGB888 + VS/HS/DE serialized to 1 Pair FPD-Link IIRandomizer/scrambler — DC-balanced data streamSelectable output VOD and adjustable de-emphasisDESERIALIZER — DS90UR906Q-Q1FAST random data lock; no reference clock requiredAdjustable input receiver equalizationLOCK (real time link status) reporting pinEMI minimization on output parallel bus (SSCG)Output slew control (OS)

Description

The DS90UR90xQ-Q1 chipset translates a parallel RGB video interface into a high-speed serialized interface over a single pair. This serial bus scheme makes system design easy by eliminating skew problems between clock and data, reducing the number of connector pins, reducing the interconnect size, weight, cost, and easing overall PCB layout. In addition, internal DC-balanced decoding is used to support AC-coupled interconnects. The DS90UR905Q-Q1 serializer embeds the clock, balances the data payload, and level shifts the signals to high-speed, low voltage differential signaling. Up to 24 inputs are serialized, along with the three video control signals. This supports full24-bit color or 18-bit color and 6 general-purpose signals (for example, Audio I2S applications). The DS90UR906Q-Q1 deserializer recovers the data (RGB) and control signals and extracts the clock from the serial stream. The DS90UR906Q-Q1 is able to lock to the incoming data stream without the use of a training sequence or special SYNC patterns and does not require a reference clock. A link status (LOCK) output signal is provided. Serial transmission is optimized by a user-selectable de-emphasis, differential output level select features, and receiver equalization. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking compatibility. The deserializer may be configured to generate spread spectrum clock and data on its parallel outputs. The DS90UR905Q-Q1 serializer is offered in a 48-pin WQFN and the DS90UR906Q-Q1 (deserializer) is offered in a 60-pin WQFN package. They are specified over the automotive AEC-Q100 grade 2 temperature range of –40°C to +105°C. The DS90UR90xQ-Q1 chipset translates a parallel RGB video interface into a high-speed serialized interface over a single pair. This serial bus scheme makes system design easy by eliminating skew problems between clock and data, reducing the number of connector pins, reducing the interconnect size, weight, cost, and easing overall PCB layout. In addition, internal DC-balanced decoding is used to support AC-coupled interconnects. The DS90UR905Q-Q1 serializer embeds the clock, balances the data payload, and level shifts the signals to high-speed, low voltage differential signaling. Up to 24 inputs are serialized, along with the three video control signals. This supports full24-bit color or 18-bit color and 6 general-purpose signals (for example, Audio I2S applications). The DS90UR906Q-Q1 deserializer recovers the data (RGB) and control signals and extracts the clock from the serial stream. The DS90UR906Q-Q1 is able to lock to the incoming data stream without the use of a training sequence or special SYNC patterns and does not require a reference clock. A link status (LOCK) output signal is provided. Serial transmission is optimized by a user-selectable de-emphasis, differential output level select features, and receiver equalization. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking compatibility. The deserializer may be configured to generate spread spectrum clock and data on its parallel outputs. The DS90UR905Q-Q1 serializer is offered in a 48-pin WQFN and the DS90UR906Q-Q1 (deserializer) is offered in a 60-pin WQFN package. They are specified over the automotive AEC-Q100 grade 2 temperature range of –40°C to +105°C.