SN74LV393A-Q1 Series

Automotive Catalog Dual 4-Bit Binary Counters

Catalog

Automotive Catalog Dual 4-Bit Binary Counters

Part	Operating Temperature [Max]	Operating Temperature [Min]	Direction	Number of Elements	Reset	Mounting Type	Package / Case [custom]	Package / Case [custom]	Package / Case	Supplier Device Package	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Bits per Element	Logic Type	Trigger Type	Count Rate	Grade	Qualification	Package / Case [x]	Package / Case [y]
Texas Instruments SN74LV393APWT	85 °C	-40 °C	Up	2	Asynchronous	Surface Mount	0.173 "	4.4 mm	14-TSSOP	14-TSSOP	2 V	5.5 V	4	Binary Counter	Negative Edge	70 MHz
Texas Instruments SN74LV393ATPWRQ1	105 ░C	-40 °C	Up	2	Asynchronous	Surface Mount	0.173 "	4.4 mm	14-TSSOP	14-TSSOP	2 V	5.5 V	4	Binary Counter	Negative Edge	70 MHz	Automotive	AEC-Q100
Texas Instruments SN74LV393ATPWRG4Q1	105 ░C	-40 °C	Up	2	Asynchronous	Surface Mount	0.173 "	4.4 mm	14-TSSOP	14-TSSOP	2 V	5.5 V	4	Binary Counter	Negative Edge	70 MHz	Automotive	AEC-Q100
Texas Instruments SN74LV393ADR	85 °C	-40 °C	Up	2	Asynchronous	Surface Mount			14-SOIC		2 V	5.5 V	4	Binary Counter	Negative Edge	70 MHz			0.154 in	3.9 mm
Texas Instruments SN74LV393APW	85 °C	-40 °C	Up	2	Asynchronous	Surface Mount	0.173 "	4.4 mm	14-TSSOP	14-TSSOP	2 V	5.5 V	4	Binary Counter	Negative Edge	70 MHz
Texas Instruments SN74LV393AD	85 °C	-40 °C	Up	2	Asynchronous	Surface Mount			14-SOIC		2 V	5.5 V	4	Binary Counter	Negative Edge	70 MHz			0.154 in	3.9 mm
Texas Instruments SN74LV393APWR	85 °C	-40 °C	Up	2	Asynchronous	Surface Mount	0.173 "	4.4 mm	14-TSSOP	14-TSSOP	2 V	5.5 V	4	Binary Counter	Negative Edge	70 MHz

Catalog

Automotive Catalog Dual 4-Bit Binary Counters

Key Features

• VCCoperation of 2 V to 5.5 VMax tpdof 10 ns at 5 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) > 2.3 V at VCC= 3.3 V, TA= 25°CIoffsupports Partial-Power-Down-Mode operationDual 4-bit binary counters with individual clocksDirect clear for each 4-bit counterCan significantly improve system densities by reducing counter package count by 50 percentLatch-Up performance exceeds 100 mA per JESD 78, Class IIVCCoperation of 2 V to 5.5 VMax tpdof 10 ns at 5 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) > 2.3 V at VCC= 3.3 V, TA= 25°CIoffsupports Partial-Power-Down-Mode operationDual 4-bit binary counters with individual clocksDirect clear for each 4-bit counterCan significantly improve system densities by reducing counter package count by 50 percentLatch-Up performance exceeds 100 mA per JESD 78, Class II

Description

The ’LV393A devices contain eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. These devices are designed for 2 V to 5.5 V VCCoperation. The ’LV393A devices contain eight flip-flops and additional gating to implement two individual 4-bit counters in a single package. These devices are designed for 2 V to 5.5 V VCCoperation.