SN74LV1T08-Q1 Series

Automotive, single power supply two-input positive-AND gate with logic level shifter

Catalog

Automotive, single power supply two-input positive-AND gate with logic level shifter

Part	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Input Logic Level - High [Max]	Input Logic Level - High [Min]	Current - Quiescent (Max) [Max]	Number of Inputs	Max Propagation Delay @ V, Max CL	Grade	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case	Qualification	Number of Circuits	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Logic Type	Mounting Type
Texas Instruments SN74LV1T08QDBVRQ1	SOT-23-5	125 °C	-40 °C	2 V	1.1 V	1 çA	2	5.3 ns	Automotive	1.6 V	5.5 V	8 mA	8 mA	SC-74A SOT-753	AEC-Q100	1	0.85 V	0.5 V	AND Gate	Surface Mount
Texas Instruments SN74LV1T08QDCKRQ1	SC-70-5	125 °C	-40 °C	2 V	1.1 V	1 çA	2	5.3 ns	Automotive	1.6 V	5.5 V	8 mA	8 mA	5-TSSOP SC-70-5 SOT-353	AEC-Q100	1	0.85 V	0.5 V	AND Gate	Surface Mount

Catalog

Automotive, single power supply two-input positive-AND gate with logic level shifter

Key Features

• AEC-Q100 qualified for automotive applications:Device temperature grade 1: -40°C to +125°CDevice HBM ESD classification level 2Device CDM ESD classification level C4BWide operating range of 1.8 V to 5.5 VSingle-supply voltage translator (refer to LVxT Enhanced Input Voltage):Up translation:1.2-V to 1.8-V1.5-V to 2.5-V1.8-V to 3.3-V3.3-V to 5.0-VDown translation:5.0-V, 3.3-V, 2.5-V to 1.8-V5.0-V, 3.3-V to 2.5-V5.0-V to 3.3-V5.5-V tolerant input pinsSupports standard pinoutsUp to 150Mbps with 5-V or 3.3-V VCCLatch-up performance exceeds 250 mAper JESD 17AEC-Q100 qualified for automotive applications:Device temperature grade 1: -40°C to +125°CDevice HBM ESD classification level 2Device CDM ESD classification level C4BWide operating range of 1.8 V to 5.5 VSingle-supply voltage translator (refer to LVxT Enhanced Input Voltage):Up translation:1.2-V to 1.8-V1.5-V to 2.5-V1.8-V to 3.3-V3.3-V to 5.0-VDown translation:5.0-V, 3.3-V, 2.5-V to 1.8-V5.0-V, 3.3-V to 2.5-V5.0-V to 3.3-V5.5-V tolerant input pinsSupports standard pinoutsUp to 150Mbps with 5-V or 3.3-V VCCLatch-up performance exceeds 250 mAper JESD 17

Description

The SN74LV1T08-Q1 is a 2-input AND Gate. Each gate performs the Boolean function Y = A × B in positive logic. The output level is referenced to the supply voltage (VCC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels. The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2-V input to 1.8-V output or 1.8-V input to 3.3-V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3-V to 2.5-V output). The SN74LV1T08-Q1 is a 2-input AND Gate. Each gate performs the Boolean function Y = A × B in positive logic. The output level is referenced to the supply voltage (VCC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels. The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2-V input to 1.8-V output or 1.8-V input to 3.3-V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3-V to 2.5-V output).