SN74LVCH16373A Series

16-Bit Transparent D-Type Latch With 3-State Outputs

Catalog

16-Bit Transparent D-Type Latch With 3-State Outputs

Part	Logic Type	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Independent Circuits	Delay Time - Propagation	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Package / Case	Package / Case [custom]	Output Type	Current - Output High, Low	Mounting Type	Circuit [custom]	Circuit [custom]	Package / Case [y]	Package / Case [y]
Texas Instruments 74LVCH16373ADGGRG4	D-Type Transparent Latch	48-TSSOP	85 °C	-40 °C	2	2.1 ns	1.65 V	3.6 V	48-TFSOP	0.24 in	6.1 mm	Tri-State	24 mA	Surface Mount	8	8
Texas Instruments 74LVCH16373ADGVRG4	D-Type Transparent Latch		85 °C	-40 °C	2	2.1 ns	1.65 V	3.6 V	48-TFSOP	0.173 in 4.4 mm		Tri-State	24 mA	Surface Mount	8	8
Texas Instruments SN74LVCH16373AZRDR	D-Type Transparent Latch	54-FBGA	85 °C	-40 °C	2	2.1 ns	1.65 V	3.6 V	54-FBGA			Tri-State	24 mA	Surface Mount	8	8
Texas Instruments SN74LVCH16373AZQLR	D-Type Transparent Latch	56-BGA Microstar Junior (7x4.5)	85 °C	-40 °C	2	2.1 ns	1.65 V	3.6 V	56-VFBGA			Tri-State	24 mA	Surface Mount	8	8
Texas Instruments SN74LVCH16373AGRDR	D-Type Transparent Latch	54-FBGA	85 °C	-40 °C	2	2.1 ns	1.65 V	3.6 V	54-FBGA			Tri-State	24 mA	Surface Mount	8	8
Texas Instruments SN74LVCH16373ADGGR	D-Type Transparent Latch	48-TSSOP	85 °C	-40 °C	2	2.1 ns	1.65 V	3.6 V	48-TFSOP	0.24 in	6.1 mm	Tri-State	24 mA	Surface Mount	8	8
Texas Instruments SN74LVCH16373ADLR	D-Type Transparent Latch	48-SSOP	85 °C	-40 °C	2	2.1 ns	1.65 V	3.6 V	48-BSSOP			Tri-State	24 mA	Surface Mount	8	8	0.295 in	7.5 mm
Texas Instruments SN74LVCH16373ADGVR	D-Type Transparent Latch		85 °C	-40 °C	2	2.1 ns	1.65 V	3.6 V	48-TFSOP	0.173 in 4.4 mm		Tri-State	24 mA	Surface Mount	8	8

Catalog

16-Bit Transparent D-Type Latch With 3-State Outputs

Key Features

• Member of the Texas Instruments Widebus FamilyTypical VOLP(Output Ground Bounce)< 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot)> 2 V at VCC= 3.3 V, TA= 25°CIoffSupports Live Insertion, Partial-Power-Down Mode, and Back-Drive ProtectionSupports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Bus Hold on Data Inputs Eliminates the Need for External Pull-up or Pull-down ResistorsLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)Member of the Texas Instruments Widebus FamilyTypical VOLP(Output Ground Bounce)< 0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot)> 2 V at VCC= 3.3 V, TA= 25°CIoffSupports Live Insertion, Partial-Power-Down Mode, and Back-Drive ProtectionSupports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)Bus Hold on Data Inputs Eliminates the Need for External Pull-up or Pull-down ResistorsLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)

Description

This 16-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCCoperation. This 16-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCCoperation.