AFE7422 Series
2-transmit, 2-receive RF-sampling transceiver, 10-MHz to 6-GHz, max 1200-MHz IBW
Manufacturer: Texas Instruments
Catalog
2-transmit, 2-receive RF-sampling transceiver, 10-MHz to 6-GHz, max 1200-MHz IBW
Key Features
• Two, 14-bit, 9-GSPS DACsUp to 1200-MHz signal bandwidth1 DSA per channel tunes output powerTwo, 14-Bit, 3-GSPS ADCsUp to 1500-MHz signal bandwidthNSD: –151 dBFS/HzAC performance at fIN= 2.6 GHz, –3 dBFSSNR: 55 dBFSSFDR: 73 dBc HD2 and HD3SFDR: 91 dBc worst spur2 DSA per channel extends dynamic rangeRF and digital power detectorsRF frequency range: 10 MHz to 6 GHzFast frequency hopping < 1 µsReceive digital signal path:Bypassable quad DDC per ADC3-phase coherent 32-bit NCOs per DDCDecimation ratio: 2x to 32xTransmit digital signal path:Quad DUC per DAC with 32-bit NCOsInterpolation ratio: 6x to 36xSin(x)/x correction and configurable delayPower amplifier protection (PAP)JESD204B interface:8 transceivers at up to 15 GbpsSubclass 1 multichip synchronizationClocks:Internal PLL and VCO with bypass optionClock output up to 3 GHz with clock dividerDAC power dissipation: 1.8 W/ch at 9 GSPSADC power dissipation: 1.9 W/ch at 3 GSPSPackage: 17-mm x 17-mm FC BGA, 0.8-mm pitchTwo, 14-bit, 9-GSPS DACsUp to 1200-MHz signal bandwidth1 DSA per channel tunes output powerTwo, 14-Bit, 3-GSPS ADCsUp to 1500-MHz signal bandwidthNSD: –151 dBFS/HzAC performance at fIN= 2.6 GHz, –3 dBFSSNR: 55 dBFSSFDR: 73 dBc HD2 and HD3SFDR: 91 dBc worst spur2 DSA per channel extends dynamic rangeRF and digital power detectorsRF frequency range: 10 MHz to 6 GHzFast frequency hopping < 1 µsReceive digital signal path:Bypassable quad DDC per ADC3-phase coherent 32-bit NCOs per DDCDecimation ratio: 2x to 32xTransmit digital signal path:Quad DUC per DAC with 32-bit NCOsInterpolation ratio: 6x to 36xSin(x)/x correction and configurable delayPower amplifier protection (PAP)JESD204B interface:8 transceivers at up to 15 GbpsSubclass 1 multichip synchronizationClocks:Internal PLL and VCO with bypass optionClock output up to 3 GHz with clock dividerDAC power dissipation: 1.8 W/ch at 9 GSPSADC power dissipation: 1.9 W/ch at 3 GSPSPackage: 17-mm x 17-mm FC BGA, 0.8-mm pitch
Description
AI
The AFE7422 is a dual-channel, wideband, RF-sampling analog front end (AFE) based on 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs. With operation at an RF of up to 6 GHz, this device enables direct RF sampling into the C-band frequency range without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multimission systems.
The DAC signal paths support interpolation and digital up conversion options that deliver up to 1200 MHz of signal bandwidth. The differential output path includes a digital step attenuator (DSA), which enables tuning of output power.
Each ADC input path includes a dual DSA and RF and Digital power detectors. Flexible decimation options provide optimization of data bandwidth and a decimation bypass mode is also available for widest signal bandwidth.
An 8-lane (8 TX + 8 RX) subclass-1 compliant JESD204B interface operates at up to 15 Gbps. A bypassable on-chip PLL simplifies clock operation with an optional clock output.
The AFE7422 is a dual-channel, wideband, RF-sampling analog front end (AFE) based on 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs. With operation at an RF of up to 6 GHz, this device enables direct RF sampling into the C-band frequency range without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multimission systems.
The DAC signal paths support interpolation and digital up conversion options that deliver up to 1200 MHz of signal bandwidth. The differential output path includes a digital step attenuator (DSA), which enables tuning of output power.
Each ADC input path includes a dual DSA and RF and Digital power detectors. Flexible decimation options provide optimization of data bandwidth and a decimation bypass mode is also available for widest signal bandwidth.
An 8-lane (8 TX + 8 RX) subclass-1 compliant JESD204B interface operates at up to 15 Gbps. A bypassable on-chip PLL simplifies clock operation with an optional clock output.
