SN74LVC2G02 Series

2-ch, 2-input, 1.65-V to 5.5-V NOR gates

Catalog

2-ch, 2-input, 1.65-V to 5.5-V NOR gates

Part	Logic Type	Package / Case	Current - Quiescent (Max) [Max]	Operating Temperature [Min]	Operating Temperature [Max]	Number of Circuits	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Number of Inputs	Supplier Device Package [y]	Supplier Device Package	Supplier Device Package [x]	Current - Output High, Low [y]	Current - Output High, Low [x]	Max Propagation Delay @ V, Max CL	Voltage - Supply [Max]	Voltage - Supply [Min]	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Mounting Type	Package / Case [y]	Package / Case [y]
Texas Instruments SN74LVC2G02YEPR	NOR Gate	8-XFBGA DSBGA	10 µA	-40 °C	125 °C	2	1.7 V	2 V	2	0.9	8-DSBGA (1.9x0.9)	1.9	32 mA	32 mA	4.4 ns	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount
Texas Instruments SN74LVC2G02DCTR	NOR Gate		10 µA	-40 °C	125 °C	2	1.7 V	2 V	2		SM8		32 mA	32 mA	4.4 ns	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount
Texas Instruments SN74LVC2G02YZAR	NOR Gate	8-XFBGA DSBGA	10 µA	-40 °C	125 °C	2	1.7 V	2 V	2	0.9	8-DSBGA (1.9x0.9)	1.9	32 mA	32 mA	4.4 ns	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount
Texas Instruments SN74LVC2G02YEAR	NOR Gate	8-XFBGA DSBGA	10 µA	-40 °C	125 °C	2	1.7 V	2 V	2		8-XFBGA DSBGA		32 mA	32 mA	4.4 ns	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount
Texas Instruments SN74LVC2G02DCUT	NOR Gate	8-VFSOP	10 µA	-40 °C	125 °C	2	1.7 V	2 V	2				32 mA	32 mA	4.4 ns	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount	2.3 mm	0.091 in
Texas Instruments SN74LVC2G02DCUR	NOR Gate	8-VFSOP	10 µA	-40 °C	125 °C	2	1.7 V	2 V	2				32 mA	32 mA	4.4 ns	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount	2.3 mm	0.091 in
Texas Instruments SN74LVC2G02YZPR	NOR Gate	8-XFBGA DSBGA	10 µA	-40 °C	125 °C	2	1.7 V	2 V	2		8-DSBGA		32 mA	32 mA	4.4 ns	5.5 V	1.65 V	0.8 V	0.7 V	Surface Mount

Catalog

2-ch, 2-input, 1.65-V to 5.5-V NOR gates

Key Features

• Available in the Texas InstrumentsNanoFree™ packageSupports 5-V VCCoperationInputs accept voltages to 5.5 VMax tpdof 4.9 ns at 3.3 VLow power consumption, 10-µA Max ICC±24-mA Output drive at 3.3 VTypical VOLP(output ground bounce)<0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(output VOHundershoot)>2 V at VCC= 3.3 V, TA= 25°CIoffsupports partial-power-down mode operationLatch-up performance exceeds 100 mA er JESD 78, class IIESD protection exceeds JESD 222000-V Human-body model (A114-A)1000-V Charged-device model (C101)Available in the Texas InstrumentsNanoFree™ packageSupports 5-V VCCoperationInputs accept voltages to 5.5 VMax tpdof 4.9 ns at 3.3 VLow power consumption, 10-µA Max ICC±24-mA Output drive at 3.3 VTypical VOLP(output ground bounce)<0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(output VOHundershoot)>2 V at VCC= 3.3 V, TA= 25°CIoffsupports partial-power-down mode operationLatch-up performance exceeds 100 mA er JESD 78, class IIESD protection exceeds JESD 222000-V Human-body model (A114-A)1000-V Charged-device model (C101)

Description

This dual 2-input positive-NOR gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC2G02 device performs the Boolean function Y =A + Bor Y =A×Bin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. This dual 2-input positive-NOR gate is designed for 1.65-V to 5.5-V VCCoperation. The SN74LVC2G02 device performs the Boolean function Y =A + Bor Y =A×Bin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.