
Catalog
Military 4-ch, 2-input, 3-V to 12-V NAND gates
Key Features
• Quiescent current specified to 15VMaximum input leakage of 1 uA at 15 V (full package-temperature range)1-V noise margin (full package-temperature range)Quiescent current specified to 15VMaximum input leakage of 1 uA at 15 V (full package-temperature range)1-V noise margin (full package-temperature range)
Description
AI
The TI-CD4011A, CD4012A, and CD4023A NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates
These types are supplied in 14-lead hermetic dual-in-line ceramic packages (D and F suffixes), 14-lead dual-in-line plastic packages (E suffix), 14-lead ceramic flat packages (K suffix), and in chip form (H suffix).
The TI-CD4011A, CD4012A, and CD4023A NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates
These types are supplied in 14-lead hermetic dual-in-line ceramic packages (D and F suffixes), 14-lead dual-in-line plastic packages (E suffix), 14-lead ceramic flat packages (K suffix), and in chip form (H suffix).