DP83561-SP Series

Space grade (QMLV-RHA) 10/100/1000 Ethernet PHY with SEFI monitoring suite

Catalog

Space grade (QMLV-RHA) 10/100/1000 Ethernet PHY with SEFI monitoring suite

Part	Operating Temperature [Min]	Operating Temperature [Max]	Type	Duplex	Data Rate	Protocol	Voltage - Supply [Max]	Voltage - Supply [Min]	Mounting Type	Package / Case	Supplier Device Package
Texas Instruments DP83561HBE/EM	-55 °C	125 °C	Transceiver	Full Half	100Mbps 10Mbps 1Gbps	Ethernet	1.155 V 1.89 V 2.625 V	1.045 V 1.71 V 2.375 V	Surface Mount	64-CFlatpack	64-CFP

Catalog

Space grade (QMLV-RHA) 10/100/1000 Ethernet PHY with SEFI monitoring suite

Key Features

• QML Class V (QMLV), RHA, SMD 5962-20216Military temperature range: –55°C to 125°CRadiation performanceRHA up to TID = 300 krad (Si)SEL immune to LET = 121 MeV·cm2/mgSingle Event Functional Interrupt (SEFI) monitor suiteMonitorIEEE PCS state machine monitorsECC configuration register monitorPLL lock monitorOn-chip temperature monitorActionInterrupt pins to monitor eventsCorrectionECC-protected configuration registersPin-configurable automatic SEFI recoverySerial Management Interface (SMI) disableFully compatible to IEEE802.3 1000BASE-T, 100BASE-TX and 10BASE-Te specificationsLow RGMII latency (Tx < 90 ns, Rx < 290 ns)Time sensitive network compliantMAC interface: RGMII, MIIIntegrated MDI termination resistorsProgrammable RGMII termination impedancePower supply: 2.5 V, 1.8 V, 1.1 VI/O voltages: 1.8 V, 2.5 V, and 3.3 V25-MHz or 125-MHz synchronized clock outputCable diagnostics: open, short using TDRJTAG supportQML Class V (QMLV), RHA, SMD 5962-20216Military temperature range: –55°C to 125°CRadiation performanceRHA up to TID = 300 krad (Si)SEL immune to LET = 121 MeV·cm2/mgSingle Event Functional Interrupt (SEFI) monitor suiteMonitorIEEE PCS state machine monitorsECC configuration register monitorPLL lock monitorOn-chip temperature monitorActionInterrupt pins to monitor eventsCorrectionECC-protected configuration registersPin-configurable automatic SEFI recoverySerial Management Interface (SMI) disableFully compatible to IEEE802.3 1000BASE-T, 100BASE-TX and 10BASE-Te specificationsLow RGMII latency (Tx < 90 ns, Rx < 290 ns)Time sensitive network compliantMAC interface: RGMII, MIIIntegrated MDI termination resistorsProgrammable RGMII termination impedancePower supply: 2.5 V, 1.8 V, 1.1 VI/O voltages: 1.8 V, 2.5 V, and 3.3 V25-MHz or 125-MHz synchronized clock outputCable diagnostics: open, short using TDRJTAG support

Description

The DP83561-SP is a high reliability gigabit ethernet PHY designed for the high-radiation environment of space. The DP83561-SP is a low power, fully featured physical layer transceiver with integrated PMD sub-layers to support 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols. The DP83561-SP is designed for easy implementation of 10/100/1000 Mbps Ethernet LANs in extremely hostile environments. It interfaces directly to twisted pair media through an external transformer. This device interfaces directly to the MAC layer through Reduced GMII (RGMII) and MII. The device is Radiation Hardened by Design (RHBD), fabricated by Texas Instruments using a CMOS process, and is available in 64-pin Ceramic Quad Flat Pack (CQFP) package, with a 11-mm × 11-mm body size (nominal). The DP83561-SP is a high reliability gigabit ethernet PHY designed for the high-radiation environment of space. The DP83561-SP is a low power, fully featured physical layer transceiver with integrated PMD sub-layers to support 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols. The DP83561-SP is designed for easy implementation of 10/100/1000 Mbps Ethernet LANs in extremely hostile environments. It interfaces directly to twisted pair media through an external transformer. This device interfaces directly to the MAC layer through Reduced GMII (RGMII) and MII. The device is Radiation Hardened by Design (RHBD), fabricated by Texas Instruments using a CMOS process, and is available in 64-pin Ceramic Quad Flat Pack (CQFP) package, with a 11-mm × 11-mm body size (nominal).