74VHC595 Series

8-Bit Shift Register with Output Latches

Catalog

8-Bit Shift Register with Output Latches

Part	Number of Elements	Mounting Type	Package / Case [x]	Package / Case	Package / Case [y]	Logic Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Number of Bits per Element	Operating Temperature [Max]	Operating Temperature [Min]	Function	Supplier Device Package	Output Type	Package / Case	Package / Case
ON Semiconductor MC74VHC595D
ON Semiconductor 74VHC595MTCX	1	Surface Mount	0.173 in	16-TSSOP	4.4 mm	Shift Register	5.5 V	2 V	8	85 °C	-40 °C	Serial to Parallel Serial	16-TSSOP	Tri-State
ON Semiconductor 74VHC595M	1	Surface Mount	0.154 in	16-SOIC	3.9 mm	Shift Register	5.5 V	2 V	8	85 °C	-40 °C	Serial to Parallel	16-SOIC	Tri-State
ON Semiconductor 74VHC595SJX	1	Surface Mount		16-SOIC		Shift Register	5.5 V	2 V	8	85 °C	-40 °C	Serial to Parallel Serial	16-SOP	Tri-State	0.209 "	5.3 mm
ON Semiconductor 74VHC595MTC	1	Surface Mount	0.173 in	16-TSSOP	4.4 mm	Shift Register	5.5 V	2 V	8	85 °C	-40 °C	Serial to Parallel Serial	16-TSSOP	Tri-State
ON Semiconductor 74VHC595M	1	Surface Mount	0.154 in	16-SOIC	3.9 mm	Shift Register	5.5 V	2 V	8	85 °C	-40 °C	Serial to Parallel Serial	16-SOIC	Tri-State
ON Semiconductor 74VHC595SJX	1	Surface Mount		16-SOIC		Shift Register	5.5 V	2 V	8	85 °C	-40 °C	Serial to Parallel Serial	16-SOP	Tri-State	0.209 "	5.3 mm

Catalog

8-Bit Shift Register with Output Latches

Key Features

• High Speed: tPD= 5.4 ns (typ) at VCC= 5V

• Low power dissipation: ICC= 4 µA (max) at TA= 25°C

• High noise immunity: VNIH= VNIL= 28% VCC(min)

• Power down protection is provided on all inputs

• Low noise: VOLP= 0.9V (typ)

• Pin and function compatible with 74HC595

Description

The VHC595 is an advanced high-speed CMOS Shift Register fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has eight 3-STATE outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output (standard) pins for cascading. Both the shift register and storage register use positive-edge triggered clocks. If both clocks are connected together, the shift register state will always be one clock pulse ahead of the storage register. An input protection circuit insures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages.