CY74FCT257T Series

Quadruple 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

Catalog

Quadruple 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

Part	Supplier Device Package	Voltage Supply Source	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case	Package / Case	Package / Case	Voltage - Supply [Min]	Voltage - Supply [Max]	Circuit [custom]	Circuit [custom]	Mounting Type	Type	Operating Temperature [Max]	Operating Temperature [Min]	Independent Circuits	Package / Case [x]	Package / Case [y]
Texas Instruments CY74FCT257TQC	16-SSOP	Single Supply	64 mA	32 mA	0.154 in	16-SSOP	3.9 mm	4.75 V	5.25 V	4	2:1	Surface Mount	Multiplexer	85 °C	-40 °C	1
Texas Instruments CY74FCT257CTSOC	16-SOIC	Single Supply	64 mA	32 mA		16-SOIC		4.75 V	5.25 V	4	2:1	Surface Mount	Multiplexer	85 °C	-40 °C	1	0.295 in	7.5 mm
Texas Instruments CY74FCT257ATD	16-SOIC	Single Supply	64 mA	32 mA		16-SOIC		4.75 V	5.25 V	4	2:1	Surface Mount	Multiplexer	85 °C	-40 °C	1	0.154 in	3.9 mm
Texas Instruments CY74FCT257TQCT	16-SSOP	Single Supply	64 mA	32 mA	0.154 in	16-SSOP	3.9 mm	4.75 V	5.25 V	4	2:1	Surface Mount	Multiplexer	85 °C	-40 °C	1
Texas Instruments CY74FCT257ATQCT	16-SSOP	Single Supply	64 mA	32 mA	0.154 in	16-SSOP	3.9 mm	4.75 V	5.25 V	4	2:1	Surface Mount	Multiplexer	85 °C	-40 °C	1
Texas Instruments CY74FCT257CTD	16-SOIC	Single Supply	64 mA	32 mA		16-SOIC		4.75 V	5.25 V	4	2:1	Surface Mount	Multiplexer	85 °C	-40 °C	1	0.154 in	3.9 mm
Texas Instruments CY74FCT257ATQC	16-SSOP	Single Supply	64 mA	32 mA	0.154 in	16-SSOP	3.9 mm	4.75 V	5.25 V	4	2:1	Surface Mount	Multiplexer	85 °C	-40 °C	1

Catalog

Quadruple 1-of-2 Data Selectors/Multiplexers with 3-State Outputs

Key Features

• Function, Pinout, and Drive Compatible With FCT and F LogicReduced VOH(Typically = 3.3 V) Version of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationMatched Rise and Fall TimesFully Compatible With TTL Input and Output Logic LevelsESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)64-mA Output Sink Current32-mA Output Source Current3-State OutputsFunction, Pinout, and Drive Compatible With FCT and F LogicReduced VOH(Typically = 3.3 V) Version of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationMatched Rise and Fall TimesFully Compatible With TTL Input and Output Logic LevelsESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)64-mA Output Sink Current32-mA Output Source Current3-State Outputs

Description

The CY74FCT257T has four identical two-input multiplexers that select four bits of data from two sources under the control of a common data-select (S) input. The I0inputs are selected when S is low, and the I1inputs are selected when S is high. Data at the output is noninverted. The CY74FCT257T is a logic implementation of a four-pole, two-position switch, where the position of the switch is determined by the logic levels at S. Outputs are in the high-impedance state when the output-enable (OE\) input is high. All but one device must be in the high-impedance state to avoid currents exceeding the maximum ratings if outputs are tied together. OE\ inputs must ensure that there is no overlap when outputs of 3-state devices are tied together. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT257T has four identical two-input multiplexers that select four bits of data from two sources under the control of a common data-select (S) input. The I0inputs are selected when S is low, and the I1inputs are selected when S is high. Data at the output is noninverted. The CY74FCT257T is a logic implementation of a four-pole, two-position switch, where the position of the switch is determined by the logic levels at S. Outputs are in the high-impedance state when the output-enable (OE\) input is high. All but one device must be in the high-impedance state to avoid currents exceeding the maximum ratings if outputs are tied together. OE\ inputs must ensure that there is no overlap when outputs of 3-state devices are tied together. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.