SN74LV4T86-EP Series

Enhanced-product four-channel two-input XOR gate with integrated level shifter

Catalog

Enhanced-product four-channel two-input XOR gate with integrated level shifter

Part	Mounting Type	Supplier Device Package	Max Propagation Delay @ V, Max CL	Logic Type	Operating Temperature [Min]	Operating Temperature [Max]	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Number of Circuits	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case [custom]	Package / Case [custom]	Package / Case	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Number of Inputs	Input Logic Level - High [Max]	Input Logic Level - High [Min]
Texas Instruments SN74LV4T86PWREP	Surface Mount	14-TSSOP	13 ns	XOR (Exclusive OR)	-55 °C	125 °C	0.85 V	0.5 V	4	1.6 V	5.5 V	0.173 "	4.4 mm	14-TSSOP	8 mA	8 mA	2	2 V	1.1 V
Texas Instruments V62/24607-01XE	Surface Mount	14-TSSOP	13 ns	XOR (Exclusive OR)	-55 °C	125 °C	0.85 V	0.5 V	4	1.6 V	5.5 V	0.173 "	4.4 mm	14-TSSOP	8 mA	8 mA	2	2 V	1.1 V

Catalog

Enhanced-product four-channel two-input XOR gate with integrated level shifter

Key Features

• Wide operating range of 1.8 V to 5.5 VSingle-supply voltage translator (refer to LVxT Enhanced Input Voltage):Up translation:1.2 V to 1.8 V1.5 V to 2.5 V1.8 V to 3.3 V3.3 V to 5.0 VDown translation:5.0 V, 3.3 V, 2.5 V to 1.8 V5.0 V, 3.3 V to 2.5 V5.0 V to 3.3 V5.5-V tolerant input pinsSupports standard pinoutsUp to 150Mbps with 5-V or 3.3-V V CCLatch-up performance exceeds 250 mA per JESD 17Supports defense, aerospace, and medical applications:Controlled baselineOne assembly and test siteOne fabrication siteExtended product life cycleProduct traceabilityWide operating range of 1.8 V to 5.5 VSingle-supply voltage translator (refer to LVxT Enhanced Input Voltage):Up translation:1.2 V to 1.8 V1.5 V to 2.5 V1.8 V to 3.3 V3.3 V to 5.0 VDown translation:5.0 V, 3.3 V, 2.5 V to 1.8 V5.0 V, 3.3 V to 2.5 V5.0 V to 3.3 V5.5-V tolerant input pinsSupports standard pinoutsUp to 150Mbps with 5-V or 3.3-V V CCLatch-up performance exceeds 250 mA per JESD 17Supports defense, aerospace, and medical applications:Controlled baselineOne assembly and test siteOne fabrication siteExtended product life cycleProduct traceability

Description

The SN74LV4T86-EP contains four independent 2-input XOR Gates with Schmitt-trigger inputs with extended voltage operation to allow for level translation. Each gate performs the Boolean function Y = A ⊕ B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.2-V, 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels. The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output). The SN74LV4T86-EP contains four independent 2-input XOR Gates with Schmitt-trigger inputs with extended voltage operation to allow for level translation. Each gate performs the Boolean function Y = A ⊕ B in positive logic. The output level is referenced to the supply voltage (V CC) and supports 1.2-V, 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels. The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output).