74LVC138AD Series

3-to-8 line decoder/demultiplexer; inverting

Manufacturer: Freescale Semiconductor - NXP

Catalog

3-to-8 line decoder/demultiplexer; inverting

Part	Voltage Supply Source	Voltage - Supply [Min]	Voltage - Supply [Max]	Type	Circuit	Independent Circuits	Mounting Type	Package / Case	Package / Case [x]	Package / Case [y]	Grade	Qualification	Current - Output High, Low	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [custom]	Package / Case [custom]
Freescale Semiconductor - NXP 74LVC138AD-Q100J	Single Supply	1.2 V	3.6 V	Decoder/Demultiplexer	1 x 3:8	1	Surface Mount	16-SOIC	0.154 in	3.9 mm	Automotive	AEC-Q100	24 mA	16-SO	125 °C	-40 °C
Freescale Semiconductor - NXP 74LVC138ADB,118	Single Supply	1.2 V	3.6 V	Decoder/Demultiplexer	1 x 3:8	1	Surface Mount	16-SSOP					24 mA	16-SSOP	125 °C	-40 °C	0.209 in	5.3 mm
Freescale Semiconductor - NXP 74LVC138ABQ-Q100X	Single Supply	1.2 V	3.6 V	Decoder/Demultiplexer	1 x 3:8	1	Surface Mount	16-VFQFN Exposed Pad			Automotive	AEC-Q100	24 mA	16-DHVQFN (2.5x3.5)	125 °C	-40 °C
Freescale Semiconductor - NXP 74LVC138AD,118	Single Supply	1.2 V	3.6 V	Decoder/Demultiplexer	1 x 3:8	1	Surface Mount	16-SOIC	0.154 in	3.9 mm			24 mA	16-SO	125 °C	-40 °C

Catalog

3-to-8 line decoder/demultiplexer; inverting

Key Features

• Overvoltage tolerant inputs to 5.5 V

• Wide supply voltage range from 1.2 V to 3.6 V

• CMOS low power consumption

• Direct interface with TTL levels

• Demultiplexing capability

• Multiple input enable for easy expansion

• Ideal for memory chip select decoding

• Mutually exclusive outputs

• Output drive capability 50 Ω transmission lines at 125 °C

• Complies with JEDEC standard:

• JESD8-7A (1.65 V to 1.95 V)

• JESD8-5A (2.3 V to 2.7 V)

• JESD8-C/JESD36 (2.7 V to 3.6 V)

• ESD protection:

• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

Description

The 74LVC138A decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 toY7). The 74LVC138A features three enable inputs (E1,E2 and E3). Every output will be HIGH unlessE1 andE2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74LVC138A to a 1-of-32 (5 to 32 lines) decoder with just four 74LVC138A ICs and one inverter. The 74LVC138A can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.