LMKDB1120 Series

DB2000QL-compliant 20-output clock buffer for PCIe Gen 1 to Gen 6

Catalog

DB2000QL-compliant 20-output clock buffer for PCIe Gen 1 to Gen 6

Part	Frequency - Max [Max]	Number of Circuits	Ratio - Input:Output [custom]	Mounting Type	Operating Temperature [Max]	Operating Temperature [Min]	Main Purpose	Input	Voltage - Supply [Max]	Voltage - Supply [Min]	Package / Case	Supplier Device Package	Output
Texas Instruments LMKDB1120Z100NPPR	400 MHz	1	1:20	Surface Mount	105 °C	-40 °C	PCI Express (PCIe)	LP-HCSL	1.89 V 3.6 V	1.71 V 2.97 V	80-VFLGA Exposed Pad	80-TLGA (6x6)	LP-HCSL
Texas Instruments LMKDB1120Z85NPPT	400 MHz	1	1:20	Surface Mount	105 °C	-40 °C	PCI Express (PCIe)	LP-HCSL	1.89 V 3.6 V	1.71 V 2.97 V	80-VFLGA Exposed Pad	80-TLGA (6x6)	LP-HCSL
Texas Instruments LMKDB1120Z100NPPT	400 MHz	1	1:20	Surface Mount	105 °C	-40 °C	PCI Express (PCIe)	LP-HCSL	1.89 V 3.6 V	1.71 V 2.97 V	80-VFLGA Exposed Pad	80-TLGA (6x6)	LP-HCSL
Texas Instruments LMKDB1120Z85NPPR	400 MHz	1	1:20	Surface Mount	105 °C	-40 °C	PCI Express (PCIe)	LP-HCSL	1.89 V 3.6 V	1.71 V 2.97 V	80-VFLGA Exposed Pad	80-TLGA (6x6)	LP-HCSL

Catalog

DB2000QL-compliant 20-output clock buffer for PCIe Gen 1 to Gen 6

Key Features

• LP-HCSL clock buffer and clock MUX that support:PCIe Gen 1 to Gen 6CC (Common Clock) and IR (Independent Reference) PCIe architecturesInput clock with or without SSCDB2000QL compliant:All devices meet DB2000QL specificationsLMKDB1120 is pin-compatible to DB2000QLExtremely low additive jitter:31fs maximum 12kHz to 20MHz RMS additive jitter at 156.25MHz13fs maximum additive jitter for PCIe Gen 45fs maximum additive jitter for PCIe Gen 53fs maximum additive jitter for PCIe Gen 6Fail-safe inputFlexible power-up sequenceAutomatic output disableIndividual output enableSBI (Side Band Interface) for high-speed output enable or disableLOS (Loss of Signal) input detection85Ω or 100Ω output impedance1.8V / 3.3V ± 10% power supply–40°C to 105°C ambient temperatureLP-HCSL clock buffer and clock MUX that support:PCIe Gen 1 to Gen 6CC (Common Clock) and IR (Independent Reference) PCIe architecturesInput clock with or without SSCDB2000QL compliant:All devices meet DB2000QL specificationsLMKDB1120 is pin-compatible to DB2000QLExtremely low additive jitter:31fs maximum 12kHz to 20MHz RMS additive jitter at 156.25MHz13fs maximum additive jitter for PCIe Gen 45fs maximum additive jitter for PCIe Gen 53fs maximum additive jitter for PCIe Gen 6Fail-safe inputFlexible power-up sequenceAutomatic output disableIndividual output enableSBI (Side Band Interface) for high-speed output enable or disableLOS (Loss of Signal) input detection85Ω or 100Ω output impedance1.8V / 3.3V ± 10% power supply–40°C to 105°C ambient temperature

Description

The LMKDB devices are a family of extremely-low-jitter LP-HCSL buffers and MUX that support PCIe Gen 1 to Gen 6 and are DB2000QL compliant. The devices provide flexible power-up sequence, fail-safe inputs, individual output enable and disable pins, loss of input signal (LOS) detection and automatic output disable features, as well as excellent power supply noise rejection performance. Both 1.8V and 3.3V supply voltages are supported. For LMKDB1120, 1.8V power supply saves 250mW power compared to 3.3V. The LMKDB devices are a family of extremely-low-jitter LP-HCSL buffers and MUX that support PCIe Gen 1 to Gen 6 and are DB2000QL compliant. The devices provide flexible power-up sequence, fail-safe inputs, individual output enable and disable pins, loss of input signal (LOS) detection and automatic output disable features, as well as excellent power supply noise rejection performance. Both 1.8V and 3.3V supply voltages are supported. For LMKDB1120, 1.8V power supply saves 250mW power compared to 3.3V.