74LCX112 Series

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

Catalog

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

Part	Output Type	Clock Frequency	Trigger Type	Current - Quiescent (Iq)	Supplier Device Package	Type	Function	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low	Mounting Type	Max Propagation Delay @ V, Max CL	Number of Elements	Voltage - Supply [Max]	Voltage - Supply [Min]	Number of Bits per Element	Package / Case	Package / Case [x]	Package / Case [y]	Input Capacitance	Package / Case	Package / Case
ON Semiconductor 74LCX112MX	Complementary	150 MHz	Negative Edge	10 µA	16-SOIC	JK Type	Reset Set(Preset)	85 °C	-40 °C	24 mA	Surface Mount	7.5 ns	2	3.6 V	2 V	1	16-SOIC	0.154 in	3.9 mm	7 pF
ON Semiconductor 74LCX112M	Complementary	150 MHz	Negative Edge	10 µA	16-SOIC	JK Type	Reset Set(Preset)	85 °C	-40 °C	24 mA	Surface Mount	7.5 ns	2	3.6 V	2 V	1	16-SOIC	0.154 in	3.9 mm	7 pF
ON Semiconductor 74LCX112SJ	Complementary	150 MHz	Negative Edge	10 µA	16-SOP	JK Type	Reset Set(Preset)	85 °C	-40 °C	24 mA	Surface Mount	7.5 ns	2	3.6 V	2 V	1	16-SOIC			7 pF	0.209 "	5.3 mm
ON Semiconductor 74LCX112MX	Complementary	150 MHz	Negative Edge	10 µA	16-SOIC	JK Type	Reset Set(Preset)	85 °C	-40 °C	24 mA	Surface Mount	7.5 ns	2	3.6 V	2 V	1	16-SOIC	0.154 in	3.9 mm	7 pF
ON Semiconductor 74LCX112MTCX	Complementary	150 MHz	Negative Edge	10 µA	16-TSSOP	JK Type	Reset Set(Preset)	85 °C	-40 °C	24 mA	Surface Mount	7.5 ns	2	3.6 V	2 V	1	16-TSSOP	0.173 in	4.4 mm	7 pF
ON Semiconductor 74LCX112SJX	Complementary	150 MHz	Negative Edge	10 µA	16-SOP	JK Type	Reset Set(Preset)	85 °C	-40 °C	24 mA	Surface Mount	7.5 ns	2	3.6 V	2 V	1	16-SOIC			7 pF	0.209 "	5.3 mm
ON Semiconductor 74LCX112MTCX	Complementary	150 MHz	Negative Edge	10 µA	16-TSSOP	JK Type	Reset Set(Preset)	85 °C	-40 °C	24 mA	Surface Mount	7.5 ns	2	3.6 V	2 V	1	16-TSSOP	0.173 in	4.4 mm	7 pF
ON Semiconductor 74LCX112M	Complementary	150 MHz	Negative Edge	10 µA	16-SOIC	JK Type	Reset Set(Preset)	85 °C	-40 °C	24 mA	Surface Mount	7.5 ns	2	3.6 V	2 V	1	16-SOIC	0.154 in	3.9 mm	7 pF

Catalog

Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

Key Features

• 5V tolerant inputs

• 2.3V-3.6V VCCspecifications provided

• 7.5 ns tPDmax (VCC= 3.3V), 10 µA ICCmax

• Power down high impedance inputs and outputs

• ±24 mA output drive (VCC= 3.0V)

• Implements patented noise/EMI reduction circuitry

• Latch-up performance exceeds 500 mA

• ESD performance: Human body model > 2000V Machine model > 2000V

Description

The LCX112 is a dual J-K flip-flop. Each flip-flop has independent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q# outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input. LCX devices are designed for low voltage (3.3V or 2.5) operation with the added capability of interfacing to a 5V signal environment. The 74LCX112 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.