CD74HCT126 Series

4-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Catalog

4-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Part	Mounting Type	Number of Elements	Voltage - Supply [Min]	Voltage - Supply [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [x]	Package / Case [y]	Package / Case	Number of Bits per Element	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Logic Type	Output Type
Texas Instruments CD74HCT126M	Surface Mount	4	4.5 V	5.5 V	125 °C	-55 °C	0.154 in	3.9 mm	14-SOIC	1	6 mA	6 mA	Buffer Non-Inverting	3-State
Texas Instruments CD74HCT126M96	Surface Mount	4	4.5 V	5.5 V	125 °C	-55 °C	0.154 in	3.9 mm	14-SOIC	1	6 mA	6 mA	Buffer Non-Inverting	3-State
Texas Instruments CD74HCT126E	Through Hole	4	4.5 V	5.5 V	125 °C	-55 °C	0.3 "	7.62 mm	14-DIP	1	6 mA	6 mA	Buffer Non-Inverting	3-State
Texas Instruments CD74HCT126MG4	Surface Mount	4	4.5 V	5.5 V	125 °C	-55 °C	0.154 in	3.9 mm	14-SOIC	1	6 mA	6 mA	Buffer Non-Inverting	3-State
Texas Instruments CD74HCT126M96G4	Surface Mount	4	4.5 V	5.5 V	125 °C	-55 °C	0.154 in	3.9 mm	14-SOIC	1	6 mA	6 mA	Buffer Non-Inverting	3-State
Texas Instruments CD74HCT126M96E4	Surface Mount	4	4.5 V	5.5 V	125 °C	-55 °C	0.154 in	3.9 mm	14-SOIC	1	6 mA	6 mA	Buffer Non-Inverting	3-State

Catalog

4-ch, 4.5-V to 5.5-V buffers with TTL-compatible CMOS inputs and 3-state outputs

Key Features

• LSTTL input logic compatibleVIL(max)= 0.8 V, VIH(min)= 2 VCMOS input logic compatibleII≤ 1 µA at VOL, VOHBuffered inputs4.5 V to 5.5 V operationWide operating temperature range: -55°C to +125°CSupports fanout up to 10 LSTTL loadsSignificant power reduction compared to LSTTL logic ICsLSTTL input logic compatibleVIL(max)= 0.8 V, VIH(min)= 2 VCMOS input logic compatibleII≤ 1 µA at VOL, VOHBuffered inputs4.5 V to 5.5 V operationWide operating temperature range: -55°C to +125°CSupports fanout up to 10 LSTTL loadsSignificant power reduction compared to LSTTL logic ICs

Description

This device contains four independent buffers with 3-state outputs. Each gate performs the Boolean function Y = A in positive logic. This device contains four independent buffers with 3-state outputs. Each gate performs the Boolean function Y = A in positive logic.