SN74LV6T06-Q1 Series

Automotive 1.8-V to 5.5-V single power supply 6-bit inverters with tri-state outputs

Catalog

Automotive 1.8-V to 5.5-V single power supply 6-bit inverters with tri-state outputs

Part	Supplier Device Package	Voltage - Supply [Max]	Voltage - Supply [Min]	Max Propagation Delay @ V, Max CL	Qualification	Current - Output High, Low	Current - Output High, Low	Mounting Type	Operating Temperature [Min]	Operating Temperature [Max]	Number of Circuits	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Package / Case	Grade	Features	Logic Type	Input Logic Level - High [Max]	Input Logic Level - High [Min]	Number of Inputs
Texas Instruments SN74LV6T06QWBQARQ1	14-WQFN (3x2.5)	5.5 V	1.65 V	9.4 ns	AEC-Q100	8 mA	-	Surface Mount Wettable Flank	-40 °C	125 °C	6	0.85 V	0.5 V	14-WFDFN Exposed Pad	Automotive	Open Drain	Inverter	2 V	1.1 V	6

Catalog

Automotive 1.8-V to 5.5-V single power supply 6-bit inverters with tri-state outputs

Key Features

• AEC-Q100 qualified for automotive applications:Device temperature grade 1: -40°C to +125°CDevice HBM ESD classification level 2Device CDM ESD classification level C4BAvailable in wettable flank QFN packageWide operating range of 1.65 V to 5.5 V5.5-V tolerant input pinsLVxT enhanced inputs combined with open-drain outputs provide maximum voltage translation flexibility:Over 6.67-Mbps operation, (R PU = 1 kΩ, C L = 30 pF)Up translation from 1.2 V to 5 V with 1.8-V supplyDown translation from 5 V to 0.8 V or even less with any valid supply5.5-V tolerant input pinsSupports standard function pinoutLatch-up performance exceeds 250 mA per JESD 17AEC-Q100 qualified for automotive applications:Device temperature grade 1: -40°C to +125°CDevice HBM ESD classification level 2Device CDM ESD classification level C4BAvailable in wettable flank QFN packageWide operating range of 1.65 V to 5.5 V5.5-V tolerant input pinsLVxT enhanced inputs combined with open-drain outputs provide maximum voltage translation flexibility:Over 6.67-Mbps operation, (R PU = 1 kΩ, C L = 30 pF)Up translation from 1.2 V to 5 V with 1.8-V supplyDown translation from 5 V to 0.8 V or even less with any valid supply5.5-V tolerant input pinsSupports standard function pinoutLatch-up performance exceeds 250 mA per JESD 17

Description

The SN74LV6T06-Q1 device contains six independent inverters with open-drain outputs. Each inverter performs the Boolean function Y = A in positive logic. The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output). The SN74LV6T06-Q1 device contains six independent inverters with open-drain outputs. Each inverter performs the Boolean function Y = A in positive logic. The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).