NC7SZ175 Series

TinyLogic UHS D-Type Flip-Flop with Asynchronous Clear

Catalog

TinyLogic UHS D-Type Flip-Flop with Asynchronous Clear

Part	Current - Quiescent (Iq)	Number of Elements	Voltage - Supply [Max]	Voltage - Supply [Min]	Mounting Type	Trigger Type	Supplier Device Package	Number of Bits per Element	Max Propagation Delay @ V, Max CL	Package / Case	Type	Output Type	Input Capacitance	Function	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [y]	Current - Output High, Low [x]
ON Semiconductor NC7SZ175P6	1 µA	1	5.5 V	1.65 V	Surface Mount	Positive Edge	SC-88 (SC-70-6)	1	4 ns	6-TSSOP SC-88 SOT-363	D-Type	Non-Inverted	3 pF	Reset	85 °C	-40 °C	32 mA	32 mA
ON Semiconductor NC7SZ175P6X-L22347	1 µA	1	5.5 V	1.65 V	Surface Mount	Positive Edge	SC-70-6	1	4 ns	6-TSSOP SC-88 SOT-363	D-Type	Non-Inverted	3 pF	Reset	85 °C	-40 °C	32 mA	32 mA
ON Semiconductor NC7SZ175L6X-L22175	1 µA	1	5.5 V	1.65 V	Surface Mount	Positive Edge	6-MicroPak	1	4 ns	6-UFDFN	D-Type	Non-Inverted	3 pF		85 °C	-40 °C	32 mA	32 mA

Catalog

TinyLogic UHS D-Type Flip-Flop with Asynchronous Clear

Key Features

• Space saving SC70 6-lead package

• Ultra small MicroPak™ leadless package

• Ultra High Speed; tPD2.6 ns Typ into 50 pF at 5V VCC

• High Output Drive; ±24 mA at 3V VCC

• Broad VCCOperating Range; 1.65V to 5.5V

• Matches the performance of LCX when operated at 3.3V VCC

• Power down high impedance inputs/output

• Overvoltage tolerant inputs facilitate 5V to 3V translation

• Patented noise/EMI reduction circuitry implemented

Description

The NC7SZ175 is a single positive edge-triggered D-type CMOS Flip-Flop with Asynchronous Clear from ON Semiconductor's Ultra High Speed Series of TinyLogic® in the space saving SC70 6-lead package. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad VCCoperating range. The device is specified to operate over the 1.65V to 5.5V VCCrange. The inputs and output are high impedance when VCCis 0V. Inputs tolerate voltages up to 7V independent of VCCoperating voltage. This single flip-flop will store the state of the D input that meets the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. A LOW input to Clear sets the Q output to LOW level. The Clear input is independent of clock.