Catalog
500-Mbps LVDS single high-speed receiver
Key Features
• Designed for Signaling Rates(1)up to:500-Mbps ReceiverOperates From a 1.8-V or 2.5-V Core SupplyAvailable in 1.5-mm × 2-mm UQFN PackageBus-Terminal ESD Exceeds 2 kV (HBM)Low-Voltage Differential Signaling With TypicalOutput Voltages of 350 mV Into a 100-Ω LoadPropagation Delay Times2.1 ns Typical ReceiverPower Dissipation at 250 MHz40 mW TypicalRequires External FailsafeDifferential Input Voltage Threshold Less Than 50mVCan Provide Output Voltage Logic Level (3.3-VLVTTL, 2.5-V LVCMOS, 1.8-V LVCMOS) Basedon External VDD Pin, Thus Eliminating ExternalLevelTranslationDesigned for Signaling Rates(1)up to:500-Mbps ReceiverOperates From a 1.8-V or 2.5-V Core SupplyAvailable in 1.5-mm × 2-mm UQFN PackageBus-Terminal ESD Exceeds 2 kV (HBM)Low-Voltage Differential Signaling With TypicalOutput Voltages of 350 mV Into a 100-Ω LoadPropagation Delay Times2.1 ns Typical ReceiverPower Dissipation at 250 MHz40 mW TypicalRequires External FailsafeDifferential Input Voltage Threshold Less Than 50mVCan Provide Output Voltage Logic Level (3.3-VLVTTL, 2.5-V LVCMOS, 1.8-V LVCMOS) Basedon External VDD Pin, Thus Eliminating ExternalLevelTranslation
Description
AI
The SN65LVDS4 is a single, low-voltage, differential line receiver in a small-outline UQFN package.
The SN65LVDS4 is a single, low-voltage, differential line receiver in a small-outline UQFN package.
