SN74AHC16374 Series

16-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputs

Catalog

16-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputs

Part	Mounting Type	Package / Case	Package / Case	Package / Case [custom]	Max Propagation Delay @ V, Max CL	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Function	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Current - Quiescent (Iq)	Clock Frequency	Type	Supplier Device Package	Number of Bits per Element	Number of Elements	Trigger Type	Input Capacitance	Voltage - Supply [Max]	Voltage - Supply [Min]	Package / Case [y]	Package / Case [y]
Texas Instruments SN74AHC16374DGGR	Surface Mount	48-TFSOP	0.24 in	6.1 mm	10.1 ns	8 mA	8 mA	Standard	85 °C	-40 °C	Non-Inverted Tri-State	4 çA	120 MHz	D-Type	48-TSSOP	8	2	Positive Edge	2.5 pF	5.5 V	2 V
Texas Instruments SN74AHC16374DL	Surface Mount	48-BSSOP			10.1 ns	8 mA	8 mA	Standard	85 °C	-40 °C	Non-Inverted Tri-State	4 çA	120 MHz	D-Type	48-SSOP	8	2	Positive Edge	2.5 pF	5.5 V	2 V	0.295 in	7.5 mm
Texas Instruments SN74AHC16374DLG4	Surface Mount	48-BSSOP			10.1 ns	8 mA	8 mA	Standard	85 °C	-40 °C	Non-Inverted Tri-State	4 çA	120 MHz	D-Type	48-SSOP	8	2	Positive Edge	2.5 pF	5.5 V	2 V	0.295 in	7.5 mm

Catalog

16-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputs

Key Features

• Members of the Texas InstrumentsWidebusTMFamilyEPICTM(Enhanced-Performance Implanted CMOS) ProcessOperating Range 2-V to 5.5-V VCC3-State Outputs Drive Bus Lines DirectlyDistributed VCCand GND Pins Minimize High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsEPIC and Widebus are trademarks of Texas Instruments Incorporated.Members of the Texas InstrumentsWidebusTMFamilyEPICTM(Enhanced-Performance Implanted CMOS) ProcessOperating Range 2-V to 5.5-V VCC3-State Outputs Drive Bus Lines DirectlyDistributed VCCand GND Pins Minimize High-Speed Switching NoiseFlow-Through Architecture Optimizes PCB LayoutLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)Package Options Include Plastic Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG), and Thin Very Small-Outline (DGV) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center SpacingsEPIC and Widebus are trademarks of Texas Instruments Incorporated.

Description

The 'AHC16374 devices are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels at the data (D) inputs. A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54AHC16374 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AHC16374 is characterized for operation from -40°C to 85°C. The 'AHC16374 devices are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels at the data (D) inputs. A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54AHC16374 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AHC16374 is characterized for operation from -40°C to 85°C.