Catalog
5-96 MHz 24-bit Color FPD-Link III Serializer
Key Features
• Qualified for Automotive ApplicationsAEC-Q100 Qualified With the Following Results:Device Temperature Grade 2: –40°C to +105°CAmbient Operating Temperature RangeDevice HBM ESD Classification Level ±8kVDevice CDM ESD Classification Level C6Supports Extended High Definition(1920x720p/60Hz) Digital Video Format5 – 96MHz PCLK Supported (STP mode)15 – 96MHz PCLK Supported (Coax mode)RGB888 + VS, HS, and DEParallel LVCMOS Video InputsSpread Spectrum Tolerant Input4 Optional Bidirectional GPIO ChannelsBidirectional Control Interface Channel Interfacewith I2C Compatible Serial Control BusOptional I2S SupportAC-Coupled Coax or STP Interconnect Up to 10metersSingle 3.3 V Operation with 1.8 V or 3.3 VCompatible LVCMOS I/O InterfaceDC-Balanced and Scrambled Data withEmbedded ClockInternal Pattern GenerationLow Power Modes Minimize Power Dissipation>8kV ISO 10605 ESD RatingQualified for Automotive ApplicationsAEC-Q100 Qualified With the Following Results:Device Temperature Grade 2: –40°C to +105°CAmbient Operating Temperature RangeDevice HBM ESD Classification Level ±8kVDevice CDM ESD Classification Level C6Supports Extended High Definition(1920x720p/60Hz) Digital Video Format5 – 96MHz PCLK Supported (STP mode)15 – 96MHz PCLK Supported (Coax mode)RGB888 + VS, HS, and DEParallel LVCMOS Video InputsSpread Spectrum Tolerant Input4 Optional Bidirectional GPIO ChannelsBidirectional Control Interface Channel Interfacewith I2C Compatible Serial Control BusOptional I2S SupportAC-Coupled Coax or STP Interconnect Up to 10metersSingle 3.3 V Operation with 1.8 V or 3.3 VCompatible LVCMOS I/O InterfaceDC-Balanced and Scrambled Data withEmbedded ClockInternal Pattern GenerationLow Power Modes Minimize Power Dissipation>8kV ISO 10605 ESD Rating
Description
AI
The DS90UB921-Q1 serializer, in conjunction with a DS90UB922-Q1, DS90UB926Q-Q1, DS90UB928Q-Q1, DS90UB948-Q1, or DS90UB940-Q1 deserializer, provides a complete digital interface for concurrent transmission of high-speed video, audio, and control data for automotive display and image sensing applications.
The chipset is ideally suited for automotive video-display systems with WVGA and HD formats. The DS90UB921-Q1 incorporates an embedded bidirectional control channel and low latency GPIO controls. This chipset translates a parallel interface into a single pair high-speed serialized interface. The serial bus scheme, FPD-Link III, supports full duplex of high-speed video data transmission and bidirectional control communication over a single link. Consolidation of video data and control over a single differential pair (or single wire) reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.
The DS90UB921-Q1 serializer embeds the clock, DC scrambles & balances the data payload, and level shifts the signals to high-speed low voltage differential (or single-ended) signaling. Up to 24 data bits are serialized along the video control signals.
EMI is minimized by the use of low voltage swing signaling, data scrambling and randomization and spread spectrum clocking compatibility.
Remote interrupts from the downstream deserializer are mirrored to a local output pin.
The DS90UB921-Q1 serializer, in conjunction with a DS90UB922-Q1, DS90UB926Q-Q1, DS90UB928Q-Q1, DS90UB948-Q1, or DS90UB940-Q1 deserializer, provides a complete digital interface for concurrent transmission of high-speed video, audio, and control data for automotive display and image sensing applications.
The chipset is ideally suited for automotive video-display systems with WVGA and HD formats. The DS90UB921-Q1 incorporates an embedded bidirectional control channel and low latency GPIO controls. This chipset translates a parallel interface into a single pair high-speed serialized interface. The serial bus scheme, FPD-Link III, supports full duplex of high-speed video data transmission and bidirectional control communication over a single link. Consolidation of video data and control over a single differential pair (or single wire) reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.
The DS90UB921-Q1 serializer embeds the clock, DC scrambles & balances the data payload, and level shifts the signals to high-speed low voltage differential (or single-ended) signaling. Up to 24 data bits are serialized along the video control signals.
EMI is minimized by the use of low voltage swing signaling, data scrambling and randomization and spread spectrum clocking compatibility.
Remote interrupts from the downstream deserializer are mirrored to a local output pin.
