ADS42JB46 Series
Dual-Channel, 14-Bit, 160-MSPS Analog-to-Digital Converter (ADC)
Manufacturer: Texas Instruments
Catalog
Dual-Channel, 14-Bit, 160-MSPS Analog-to-Digital Converter (ADC)
Key Features
• Dual-Channel ADCs14-Bit ResolutionMaximum Clock Rate: 160 MSPSJESD204B Serial InterfaceSubclass 0, 1, 2 CompliantUp to 3.125 GbpsTwo- and Four-Lane SupportAnalog Input Buffer with High-ImpedanceInputFlexible Input Clock Buffer:Divide-by-1, -2, and -4Differential Full-Scale Input: 2 VPPand 2.5 VPP(Register Programmable)Package: 9-mm × 9-mm QFN-64Power Dissipation: 679 mW/ChAperture Jitter: 85 fSrmsInternal DitherChannel Isolation: 100 dBPerformance:fIN= 170 MHz at 2 VPP, –1 dBFSSNR: 72.9 dBFSSFDR: 90 dBc for HD2, HD3SFDR: 100 dBc for Non HD2, HD3fIN= 170 MHz at 2.5 VPP, –1 dBFSSNR: 74.2 dBFSSFDR: 84 dBc for HD2, HD3 and95 dBc for Non HD2, HD3Dual-Channel ADCs14-Bit ResolutionMaximum Clock Rate: 160 MSPSJESD204B Serial InterfaceSubclass 0, 1, 2 CompliantUp to 3.125 GbpsTwo- and Four-Lane SupportAnalog Input Buffer with High-ImpedanceInputFlexible Input Clock Buffer:Divide-by-1, -2, and -4Differential Full-Scale Input: 2 VPPand 2.5 VPP(Register Programmable)Package: 9-mm × 9-mm QFN-64Power Dissipation: 679 mW/ChAperture Jitter: 85 fSrmsInternal DitherChannel Isolation: 100 dBPerformance:fIN= 170 MHz at 2 VPP, –1 dBFSSNR: 72.9 dBFSSFDR: 90 dBc for HD2, HD3SFDR: 100 dBc for Non HD2, HD3fIN= 170 MHz at 2.5 VPP, –1 dBFSSNR: 74.2 dBFSSFDR: 84 dBc for HD2, HD3 and95 dBc for Non HD2, HD3
Description
AI
The ADS42JB46 is a high-linearity, dual-channel, 14-bit, 160-MSPS, analog-to-digital converter (ADC). This device supports the JESD204B serial interface with data rates up to 3.125 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy, thus making driving analog inputs up to very high input frequencies easy. A sampling clock divider allows more flexibility for system clock architecture design. The device employs internal dither algorithms to provide excellent spurious-free dynamic range (SFDR) over a large input frequency range.
The ADS42JB46 is a high-linearity, dual-channel, 14-bit, 160-MSPS, analog-to-digital converter (ADC). This device supports the JESD204B serial interface with data rates up to 3.125 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy, thus making driving analog inputs up to very high input frequencies easy. A sampling clock divider allows more flexibility for system clock architecture design. The device employs internal dither algorithms to provide excellent spurious-free dynamic range (SFDR) over a large input frequency range.
