NV25320MUW Series

EEPROM Serial 32-Kb SPI - Automotive Grade 1 (+125°C), Wettable Flank UDFN Package

Catalog

EEPROM Serial 32-Kb SPI - Automotive Grade 1 (+125°C), Wettable Flank UDFN Package

Part	Grade	Access Time	Technology	Operating Temperature [Min]	Operating Temperature [Max]	Write Cycle Time - Word, Page	Memory Size	Memory Interface	Qualification	Clock Frequency	Supplier Device Package	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Memory Format	Memory Organization [custom]	Memory Organization [custom]	Memory Type	Mounting Type
ON Semiconductor NV25320MUW3VTBG	Automotive	35 ns	EEPROM	-40 °C	125 °C	5 ms	32 Kbit	SPI	AEC-Q100	10 MHz	8-UDFN (2x3)	2.5 V	5.5 V	8-UFDFN Exposed Pad	EEPROM	4 K	8 bits	Non-Volatile	Surface Mount

Catalog

EEPROM Serial 32-Kb SPI - Automotive Grade 1 (+125°C), Wettable Flank UDFN Package

Key Features

• Automotive Temperatures Grade0: -40°C to +150°C/VCC= 2.5 V to 5.5 V

• SOIC and TSSOP 8−pad Packages

• 20/ 10 MHz SPI Compatible

• SPI Modes (0,0) & (1,1)

• 32-byte Page Write Buffer

• Self-timed Write Cycle

• Hardware and Software Protection

• Block Write Protection- Protect ¼, ½ or Entire EEPROM Array

• Low Power CMOS Technology

• 200 Year Data Retention

• Additional Identification Page with Permanent Write Protection

• NV Prefix for Automotive and Other Applications Requiring Site andChange Control

• Program/Erase Cycles: 4,000,000 at 25°C; 1,200,000 at +85°C; 600,000 at +125°C; 300,000 at +150°C;

• These Devices are Pb-Free, Halogen Free/BFR Free, and RoHS Compliant

Description

NV25320 is a EEPROM Serial 32-Kb SPI - Automotive Grade 0 (+150°C) device internallyorganized as 4Kx8 bits. It features a 32−byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the NV25xxx device. The device features software and hardware write protection, including partial as well as full array protection. Byte Level On−Chip ECC (Error Correction Code) makes the device suitable for high reliability applications. The device offers an additional Identification Page which can be permanently write protected.